Non-binary low-density parity-check codes are robust to various channel impairments. However, based on the existing decoding algorithms, the decoder implementations are expensive because of their excessive computational complexity and memory usage. Based on the combinatorial optimization, we present an approximation method for the check node processing. The simulation results demonstrate that our scheme has small performance loss over the additive white Gaussian noise channel and independent Rayleigh fading channel. Furthermore, the proposed reduced-complexity realization provides significant savings on hardware, so it yields a good performance-complexity tradeoff and can be efficiently implemented.

This paper presents a class of high-rate codes called low-density parity-check accumulate (LDPCA) codes. The code design is the serial concatenation of an LDPC outer code and an accumulator with an interleaver. The iterative decoding for the LDPCA code design has complexity linear to the code length. When using regular LDPC codes with column weight 2, the proposed codes have low encoding complexity and are advantageous for hardware implementation. Simulation results show that the regular LDPCA codes have the same error performance with the regular LDPC codes at the waterfall region and outperform product accumulate codes at the error floor region. The investigation on weight distributions proves that regular LDPCA codes have the asymptotic minimum distance proportional to the code length. In addition, iterative decoding thresholds under density evolution are obtained with a Gaussian approximation.

In this paper, we investigate the asymptotic ensemble weight enumerators of multi-edge type codes whose component codes are arbitrary block codes. Two forms of asymptotic growth rate of codewords, corresponding to the primal and dual problems, are obtained. Furthermore, for the codewords of small linear-sized weights, we develop a simplification method to restrict the search space of the primal problem and study the optimality conditions of the dual problem, giving a first-order approximation of the growth rate and a condition of exponentially few small weight codewords.

For a turbo coded BLAST (Bell LAbs Space-Time architecture) system with Nttransmit antennas and Nrreceive antennas, there is a significant gap between its detection threshold and the capacity in case Nt> Nr. In this paper, we show that by introducing a convolutional interleaver with block delay between the BLAST mapper and the turbo encoder, the threshold can be improved. Near-capacity thresholds can be achieved for some cases. To take advantage of the low detector complexity in Alamouti STBC (space-time block code), we also investigate a STBC system, which is the concatenation of the Alamouti STBC with a turbo trellis coded modulation. By using a proper labelling and adding a convolutional interleaver with block delay to such a STBC system, we achieve both lower error floors and lower thresholds.

For LDPC-like codes such as LDPC, GLDPC, and DGLDPC codes, it is well known that the error floor can be caused by the codewords of small weights or stopping sets of small sizes. In this paper, we investigate the computation of asymptotic weight enumerators such that it becomes a convenient tool to determine a good distribution of code ensembles. In addition, by analyzing the first order approximation, we derive a condition to obtain a negative asymptotic growth rate of the codewords of small linear-sized weights, which is an important constraint for distribution optimization. Also the weight enumerators of turbo and repeat-accumulate codes are investigated. Furthermore, we extend our results to nonbinary DGLDPC codes. Generalization to N-layer and convolutional code based LDPC-like codes are also developed.

Protograph-based doubly generalized LDPC (DGLDPC) codes are explored in this paper. We extend (and in the process simplify) the technique for computing the ensemble weight enumerators of protograph-based LDPC and GLDPC codes to DGLDPC codes. We find that with careful design, protograph-based DGLDPC codes can have a better asymptotic growth rate of minimum distance than that of the protograph-based LDPC and GLDPC codes. Simulation results confirm that protograph-based DGLDPC codes have a low error floor.

In this paper, we investigate detection-decoding algorithms for the near-capacity performances of turbo coded MIMO (multiple-input multiple-output) schemes in the fast fading channel. Both the conventional turbo coded MIMO scheme Gamma0and turbo coded MIMO scheme with interblock memory which is denoted by Gamma are investigated. Gamma is implemented by introducing some delay elements between the BLAST mapper and the turbo encoder. We show that, unlike Gamma0, the extrinsic information transfer (EXIT) curves of detector and turbo decoder in Gamma can match well. Hence, Gamma can provide error performances much better than Gamma0. In particular, we find an improved detection and decoding algorithm which can closely approach the Shannon capacity.

In a paper authored by Ashikhmin, et. al., a low-density parity-check (LDPC) coded transmission scheme operated on multiple-input multiple-output (MIMO) fading channel was proposed, which can achieve capacity-approaching performance in case the code length is 100000 bits. In this paper, we add interblock memory to the LDPC or turbo coded MIMO system, in which only the receiver knows the channel. The simulation results show that this technique gives advantage in case that the code is short.