Today's highly integrated System-on-Chips (SoC) demand innovative architectural modeling means to cope with their energy constraints. In this context, SystemC has become a well-established simulation tool for Transaction Level Modeling (TLM) in the integrated electronics industry but it lacks the support for power modeling. This paper introduces ActivaSC, a flexible, fast, transparent and non-intrusive extension to the SystemC class library which allows capturing the activity information of a digital system being modeled. This information can then be post-processed to estimate power consumption. ActivaSC avoids time consuming design iterations as designers can assess architectural design trade-offs based on system activity early in the design flow. ActivaSC does not require any code alterations nor a specific API, so that it can be used with any modeling style. Finally, several benchmark tests illustrate the superior efficiency of ActivaSC. A speed-up of up to 75% in terms of elaboration overhead and 20% in terms of simulation overhead is realized with respect to prior art.

This paper presents a flexible digital receiver for pulsed Ultra-Wideband (UWB) communications which is sampling below Nyquist rate. This receiver can trade demodulation performance for sampling rate, i.e. power consumption. The bit error rate for pulse amplitude and pulse position modulations is evaluated in AWGN and typical UWB channels. The performance of several types of equalizer is compared, taking into account their implementation complexity. A suboptimal but implementation efficient Minimum Mean-Square Error (MMSE) equalizer which reaches performances similar to the ideal MMSE equalizer is proposed. The impact of imperfect knowledge of the propagation channel and signal-to-noise ratio, due to the limited number of training symbols, on the performance of the receiver is assessed. Finally, the receiver architecture and implementation cost are discussed. The proposed subsampling receiver provides an attractive alternative to classical architectures based on correlation with a template.

A flexible digital architecture for a pulsed ultra-wideband demodulator sampling below Nyquist rate is presented. The system is based on a complex Singular Value Decomposition implemented on a configurable systolic array of simple processors. Automatic code generation is applied to cut design time and rapidly assess the implementation cost of several architectures of the processors.

Impulse-radio-UWB is the ideal air interface for low power wireless applications especially when they require ranging capabilities. This paper presents a complete UWB transceiver system, including acquisition and ranging protocols. The system is fully reconfigurable in terms of bandwidth, data rate, processing gain, acquisition protocol and ranging accuracy, in order to fulfill the needs of the application with minimal energy consumption. The complete system is demonstrated by measurements on an IR-UWB transceiver platform built around 3 fully integrated CMOS chips. The transceiver system achieves a data rate up to 50 Mbps and a ranging error with a root mean squared error of less than 10 cm while consuming 31.7 mW. The IC implementation allows to fully validate the power/flexibility trade-off that can be achieved with integrated solutions.

Several EDA surveys confirm that the Mathworks Matlab/Simulink and the unified modelling language (UML) are both gaining increased attention as electronic system level (ESL) languages. While Matlab is commonly used to model signal processing intensive systems, UML has the potential to support innovative ESL methodologies which tie the architecture, design and verification aspects in a unified perspective. Integrated design flows which exploit the benefits of the complementarity between UML and Matlab provide an interesting answer to the issues of mono-disciplinary modeling and the necessity of moving beyond point-tool solutions. This paper summarizes how UML and Matlab/Simulink can be associated and what is the impact of SysML, a new modeling language based on UML to describe complex heterogeneous systems

This paper presents a low power pulsed UWB receiver sampling below Nyquist rate which can accomodate time-varying data rate and quality-of-service requirements for applications communicating via UWB. The performance of pulse amplitude and pulse position modulations is assessed in AWGN and dense multipath environments using the standard IEEE 802.15.3a channel models. The proposed subsampling receiver provides an attractive digital alternative to the classical approach based on analog correlations, and can reach data rates above 100 Mb/s.

This paper starts with a brief introduction to the UML 2.0 and application-specific UML customizations via profiles. After a discussion of UML design tools with focus on EDA support, we present a HW/SW co-design approach and demonstrate how HW architectures are described together with application SW in a unique UML based environment. Using a dedicated profile providing support for SystemC in UML, and a SystemC wrapper for the SimIt instruction set simulator of a StrongARM, an executable model of the complete architecture is generated which can be simulated by the SystemC kernel. The physical layer of an 802.11a system is used as an application example.

UML is gaining increased attention as a system design language, as indicated by current standardization activities such as the SysML initiative and the UML for SoC Forum. Moreover the adoption of UML 2 is a significant step towards a broader range of modeling capabilities. This paper provides an overview of the impact of these recent advances on the application of UML for SoC and NoC development, proposes a model-driven development method taking benefit of the best techniques recently introduced, and investigates the design of power efficient systems with UML.