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Jerry P. Grossman

dblp:46/1992 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design		 0.021998
Characterization and parameterized generation of synthetic combinational benchmark circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998
Characterization and Parameterized Random Generation of Digital Circuits · DAC 1996
Electronic design automation
benchmark generation		 0.011998
Characterization and parameterized generation of synthetic combinational benchmark circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998
Electronic design automation
logic synthesis		 0.011998
Characterization and parameterized generation of synthetic combinational benchmark circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1998
Electronic design automation › physical design
placement and routing		 0.011996
Characterization and Parameterized Random Generation of Digital Circuits · DAC 1996

Methods — techniques the papers use, named apart from their topics

graph-theoretic characterization · 0.0parameterized generation · 0.0
YearPublicationVenuePosition
1998 Characterization and parameterized generation of synthetic combinational benchmark circuits
abstract
The development of new field-programmed, mask-programmed, and laser-programmed gate-array architectures is hampered by the lack of realistic test circuits that exercise both the architectures and their automatic placement and routing algorithms. In this paper, we present a method and a tool for generating parameterized and realistic synthetic circuits. To obtain the realism, we propose a set of graph-theoretic characteristics that describe a physical netlist, and have built a tool that can measure these characteristics on existing circuits. The generation tool uses the characteristics as constraints in the synthetic circuit generation. To validate the quality of the generated netlists, parameters that are not specified in the generation are compared with those of real circuits and with those of more "random" graphs.
Mike Hutton, Jonathan Rose, Jerry P. Grossman, Derek G. Corneil
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
1996 Characterization and Parameterized Random Generation of Digital Circuits
abstract
The development of new Field-Programmed, Mask-Programmed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the architectures and their automatic placement and routing algorithms.In this paper, we present a method and a tool for generating parameterized and realistic random circuits.To obtain the realism, we propose a set of graph-theoretic characteristics that describe a physical netlist, and have built a tool that can measure these characteristics on existing circuits.The generation tool uses the characteristics as constraints in the random circuit generation.To validate the quality of the generated netlists, parameters that are not speci ed in the generation are c ompared with those of real circuits, and with those of \random" graphs.rameter which i s a c haracteristic of the circuit in question. Circuit Characterization Circuit Generation ValidationCharacteristics and Measured Parameters (n, nPI, nPO, delay, shape, edge-length, fanout dist'n) 2 Circuit Characterization This section describes some of the statistical and structural characteristics of circuits which w e h a v e identi ed.For the purposes of this paper we focus on combinational circuits only, and have used the MCNC benchmark circuits to form the
Mike Hutton, Jerry P. Grossman, Jonathan Rose, Derek G. Corneil
 DAC2