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Steven K. Dew

dblp:46/871 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2001
0000-0003-4830-7186ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 61% Electronic design automation · 30% Integrated circuit design · 9%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation › simulation › thermal simulation
3d thermal simulation
0.012001
A 3D thermal simulation tool for integrated devices-Atar · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2001
Electronic design automation
mesh generation
0.012001
A 3D thermal simulation tool for integrated devices-Atar · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2001
Performance modeling and evaluation › simulation
thermal simulation
0.012001
A 3D thermal simulation tool for integrated devices-Atar · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2001

Methods — techniques the papers use, named apart from their topics

transmission line matrix method · 0.0resistance-capacitance network extraction · 0.0
YearPublicationVenuePosition
2001 A 3D thermal simulation tool for integrated devices-Atar
abstract
This paper presents a novel three-dimensional (3D) thermal simulation tool for semiconductor integrated devices. The simulator is used to automatically generate an accurate 3D physical model of the device to be simulated from layout information. The simulator produces an appropriate mesh of the device based on a rectangular block structure. The mesh is automatically created such that a fine mesh is produced around heat generation regions, but a moderate number of blocks are used for the entire device. This paper first confirms that the simulator produces an accurate solution to the nonlinear differential equation describing the heat flow. Then model generation from three example technologies (silicon trench, GaAs mesa structures, silicon on insulator) is presented. The potential of the simulator to quickly and easily explore the effect of layout and process variations is illustrated, with the simulation of a two-transistor GaAs power cell as a large example. The program incorporates a transient solver based on a transmission line matrix (TLM) implementation using a physical extraction of a resistance and capacitance network. The formulation allows for temperature dependent material parameters and a nonuniform time stepping. An example of a full transient solution of heat flow in a realistic Si trench device is presented.
Tom J. Smy, David J. Walkey, Steven K. Dew
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3