Dictionary machine is an important VLSI system performing high speed data archival operations. In this paper, we present a design which can efficiently implement dictionary machines in VLSI processor arrays. In order to effectively process the operations of dictionary machine, hexagonal mesh is selected as the host topology in which two different networks for update and query operation are embedded. The proposed design is simple to implement as well as allows high throughput.

Distributed self-diagnosis approach proposed for multiprocessor systems is also effective for integrated circuit wafers containing a number of identical circuits. Here the testing of each node is based on the majority voting on the test results from itself and neighboring nodes. In this paper, we identify that the unanimous voting (UV) approach always outperforms the individual voting (IV) approach, irrespective of the number of voting cells and fault rate. Based on the UV approach, the optimal number of tests is obtained. We also introduce an adaptive voting scheme by which the test overhead of the traditional voting schemes can be significantly reduced.>

Interleaved memory schemes have been used to increase the memory bandwidth. In this paper, we propose a new interleaved memory scheme called PSIM (Periodically Shifted Interleaved Memory), which allows high memory bandwidths at the sacrifice of very small memory space. It is a stride dependent scheme where the processor utilization is 100% for most strides using a power-of-two number of memory modules. We show, analytically and then by simulation, that the efficiency of PSIM is consistently higher than not only earlier stride dependent schemes but also stride independent schemes for both short and long vector accesses