EDBT 2026 Demo / reviewers in the wild / expert
Nick Van Helleputte
dblp:47/10281
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7ranked-venue papers
0as first author
3since 2021 · last 2025
0000-0002-7511-1923ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6 · 3 since 2021Applied, interdisciplinary, general and emerging computing · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | A 13-Bit ENOB Fully Asynchronous Noise-Shaping SAR ADC With Coarse-Fine Comparison, Mismatch Error Shaping and Digital PredictionabstractHigh-resolution ADCs require low noise and low distortion while consuming minimal power. This paper presents a power-efficient, calibration-free, 2nd-order noise-shaping (NS) SAR ADC. Mismatch error shaping (MES) is employed to reduce distortion from capacitive DAC mismatches. The resulting input range loss is compensated for by an additional digital prediction (DP) method. To mitigate the high power consumption of the multi-input dynamic comparator, this work proposes a coarse-fine comparison (CFC) scheme, enabling the ADC to switch between SAR and NS-SAR modes. This approach reduces the power consumption of the comparator while maintaining NS functionality. Furthermore, to eliminate the need for an external high-speed clock to control SAR logic and NS operation, this work utilizes a fully asynchronous logic driven solely by a sample-and-hold clock. Implemented in standard 130-nm CMOS technology, this prototype ADC achieves a measured 81.54-dB SNDR (13.25-bit ENOB) in a 100-kHz bandwidth with an oversampling ratio (OSR) of 25. Chen Wang 0130, Qiuyang Lin, Hanyue Li, Chaohan Wang, Carolina Mora Lopez, Nick Van Helleputte |
ISCAS | 7 |
| 2023 | High-Throughput Nanopore-FET Array Readout IC With 5-MHz Bandwidth and Background Offset/Drift CalibrationabstractThis paper presents a high-speed readout interface suitable for nanopore-FET (NPFET) sensor arrays, which are being explored for high-throughput DNA or protein sequencing applications. The readout interface utilises a novel architecture that can simultaneously perform recording and automatic background calibration to compensate for offset and drift of the individual NPFET threshold voltages, eliminating the need for a separate calibration step or an area-consuming DAC. A prototype readout IC has been manufactured in 0.18-$\mu \text{m}$CMOS to validate the circuit concepts. It features 32 NPFET interface circuits multiplexed to 8 parallel analog outputs. Each individual channel achieves a bandwidth of 10 MHz. The prototype IC has been characterised experimentally, and the online calibration capability has been validated with liquid-gated FETs in a microfluidics setup. Aurojyoti Das, Qiuyang Lin, Sybren Santermans, Chris Van Hoof, Georges Gielen, Nick Van Helleputte |
IEEE Trans. Circuits Syst. I Regul. Pap. | 7 |
| 2021 | Modeling and Characterization of Intra-Body Links for a Smart Contact LensabstractModern and miniaturized ASICs enable the development of anatomically constrained applications within the biomedical framework, such as smart contact lenses. Recent works report lenses receiving power and communicating through inductive coupled links. However, the efficiency of an inductive link depends highly on alignment and distance between coils, thus encouraging the exploration of other techniques to power and communicate a smart contact lens. Intra-body links emerge as an alternative to inductive ones for wearable devices, with promising path-loss results reported in previous works. Here, we evaluate the feasibility of powering a smart contact lens through an intra-body link. We propose a simplified 3D-FEM human-head model to estimate channel losses in a real contact lens situation. Then, we validate the pathloss estimations on the head through a human arm experiment, and comparison against a simplified 3D-FEM human-arm model. Based on our analysis, we estimate retrieved power of μW level, demonstrating the feasibility of using an intra-body link to power a smart contact lens. Nestor Cuevas, Elkim Roa, Stefano Stanzione, Nick Van Helleputte, Bogdan C. Raducanu |
ISCAS | 4 |
| 2019 | A Wearable Wrist-Band with Compressive Sensing based Ultra-Low Power Photoplethysmography Readout CircuitabstractIn this paper, we present our efforts towards packaging of a novel compressive sampling (CS) based ultra-low power photoplethysmography (PPG) application-specific integrated circuit (ASIC) into a wearable form factor. The system comprises of a custom PPG analog front-end circuit, integrated with a digital back-end to enable CS, and a commercial off-the-shelf (COTS) system-on-chip (SoC) for Bluetooth Low Energy (BLE) based wireless data transfer. The ASIC consumes$172 [\pmb \mu \mathrm{W}$power to extract heart rate from the sparse PPG signal where the whole system consumes 1.66 mW power for continuous streaming of heart rate data over the COTS BLE radio. This work presents the first ever demonstration of a CS based PPG ASIC in wrist-band form factors and paves our way towards deploying and evaluating this custom PPG ASIC in future clinical studies. The modular architecture of the wristband platform allows for incorporation of other sensors for future correlated sensing studies between health and environment. Parvez Ahmmed, James Dieffenderfer, Jose Manuel Valero-Sarmiento, Pamula Venkata Rajesh 0002, Nick Van Helleputte, Chris Van Hoof, Marian Verhelst, Alper Bozkurt |
BSN | 5 |
| 2018 | BiometricNet: Deep Learning based Biometric Identification using Wrist-Worn PPGabstractRapid advances in semiconductor fabrication technology have enabled the proliferation of miniaturized body-worn sensors capable of long term pervasive biomedical signal monitoring. In this paper, we present a novel deep learning-based framework (BiometricNET) on biometric identification using data collected from wrist-worn Photoplethysmography (PPG) signals in ambulatory environments. We have formulated a completely personalized data-driven approach, using a four-layer deep neural network - employing two convolution neural network (CNN) layers in conjunction with two long short-term memory (LSTM) layers, followed by a dense output layer for modelling the temporal sequence inherent within the pulsatile signal representative of cardiac activity. The proposed network configuration was evaluated on the TROIKA dataset collected from 12 subjects involved in physical activity, achieved an average five-fold cross-validation accuracy of 96%. Luke R. Everson, Dwaipayan Biswas, Madhuri Panwar, Dimitrios Rodopoulos, Amit Acharyya, Chris H. Kim, Chris Van Hoof, Mario Konijnenburg, Nick Van Helleputte |
ISCAS | 9 |
| 2018 | Algorithm/Architecture Co-optimisation Technique for Automatic Data Reduction of Wireless Read-Out in High-Density Electrode ArraysabstractHigh-density electrode arrays used to read out neural activity will soon surpass the limits of the amount of data that can be transferred within reasonable energy budgets. This is true for wired brain implants when the required bandwidth becomes very high, and even more so for untethered brain implants that require wireless transmission of data. We propose an energy-efficient spike data extraction solution for high-density electrode arrays, capable of reducing the data to be transferred by over 85%. We combine temporal and spatial spike data analysis with low implementation complexity, where amplitude thresholds are used to detect spikes and the spatial location of the electrodes is used to extract potentially useful sub-threshold data on neighboring electrodes. We tested our method against a state-of-the-art spike detection algorithm, with prohibitively high implementation complexity, and found that the majority of spikes are extracted reliably. We obtain further improved quality results when ignoring very small spikes below 30% of the voltage thresholds, resulting in 91% accuracy. Our approach uses digital logic and is therefore scalable with an increasing number of electrodes. Yahya H. Yassin, Francky Catthoor, Fabian Kloosterman, Jyh-Jang Sun, João Couto, Per Gunnar Kjeldsberg, Nick Van Helleputte |
ACM Trans. Embed. Comput. Syst. | 7 |
| 2017 | Analysis of passive charge balancing for safe current-mode neural stimulationabstractCharge balancing has been often considered as one of the most critical requirement for neural stimulation circuits. Over the years several solutions have been proposed to precisely balance the charge transferred to the tissue during anodic and cathodic phases. Elaborate dynamic current sources/sinks with improved matching, and feedback loops have been proposed with a penalty on circuit complexity, area or power consumption. Here we review the dominant assumptions in safe stimulation protocols, and derive mathematical models to determine the effectiveness of passive charge balancing in a typical application scenario. Luis E. Rueda G., Marco Ballini, Nick Van Helleputte, Srinjoy Mitra |
ISCAS | 3 |