Junming Zeng

dblp:47/10594 · DBLP profile ↗
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12ranked-venue papers
3as first author
9since 2021 · last 2026
—ORCID · conflict

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Systems, architecture and hardware · 12 · 3 first-author · 9 since 2021
YearPublicationVenuePosition
2026 A 0.35 mm2 Fully Pipelined JPEG Encoder for Monolithic CMOS ISFET Array Integration
Junming Zeng, Pantelis Georgiou
ISCAS2
2026 An ISFET based Multi-Modal Low-Power Chopper-Stabilised Analogue Front-End for Wearable Physiological and Sweat Monitoring
Shuanghua Liu, Haotian Yuan 0003, Junming Zeng, Pantelis Georgiou
ISCAS3
2024 A Dynamic Coupled Electro-Thermal Equivalent Circuit Model with Reversible Entropy Heat for Lithium-Ion Batteries
abstract
Electrical, thermal, and chemical effects of batteries must be considered together for accurate modeling of the battery characteristics. Chemical effects of Lithium-ion batteries involve battery relaxation, recovery effect and reversible entropy heat. Previous hybrid kinetic circuit model can handle the first two chemical effects. This study incorporates the reversible entropy heat in a coupled electro-thermal equivalent circuit to form a dynamic electro-thermal battery model. The new battery model offers accurate dynamic performance as evidenced by good agreements between model predictions and practical measurements in terms of battery voltage, current, temperature and state-of-charge. The error in battery surface temperature prediction is kept within 0.5%. It is suitable for both circuit simulation and practical real-time control.
Kerui Li, Hui Wen Rebecca Liang, Junming Zeng, Ron Shu-Yuen Hui
IECON3
2024 A Low Power Analogue Compressed Sensing Approach for CMOS ISFET Arrays
abstract
In this work, we propose a novel approach to integrate a scalable compressed sensing methodology in the analogue domain with a CMOS ISFET array. A current conveyor is employed with a switched capacitor to encode the output current from each ISFET sensor to a corresponding charge onto a capacitor, following by a pseudo-random non-zero diagonal sampling matrix that is generated by Linear Feedback Shift Registers (LSFR) for array sampling. The design also features a 12-bit Successive Approximation Register (SAR) ADC, enabling power efficient conversions at 50 KSamples/s using a 1.25 MHz clock, with an ENOB of 10.3. The 32 × 32 array is divided into 16 clusters, each containing 64 pixels arranged in an 8 × 8 configuration serving as a compressed sensing unit block. The overall system is designed under a 65 nm process occupying a silicon area of 0.375 mm2. It operates at a programmable frame rate of 30 - 240 fps, with an overall power consumption of 17.13 -117.23 μW, and a lowest energy per pixel of 394 pJ in compressed sensing mode. We verify the performance of the system with a PSNR comparison for image quality under two scenarios where CS is either enabled or disabled.
Shuanghua Liu, Junming Zeng, Pantelis Georgiou
ISCAS2
2023 Drift Prediction and Chemical Reaction Identification for ISFETs using Deep Learning
abstract
This paper demonstrates a novel framework utilising artificial neural networks (ANNs) to identify electrochemical signals, estimate drift and perform signal extraction for ISFET sensors. We propose a neural network based on the combination of Multi-Layer Perceptrons (MLPs) and Gated Recurrent Units (GRUs), to aid the analysis of chemical reactions for ISFETs by identifying the reaction origin and compensating for drift in real time. The model is trained and tested using Keras on an artificial dataset, achieving a reaction classification accuracy of 89.71 % with an average delay of 15.73s. We have also implemented the proposed model on an FPGA through high-level synthesis (HLS) with a tunable latency of 56254 clock cycles under an 100 MHz clock. This work paves the way for enhancing biosensors with ANNs, where a smart electrochemical imager with integrated edge processing can be implemented for various biomedical applications.
Taiyu Zhu, Junming Zeng, Pantelis Georgiou
ISCAS4
2023 Edge-Based Temporal Fusion Transformer for Multi-Horizon Blood Glucose Prediction
abstract
Deep learning models have achieved the state of the art in blood glucose (BG) prediction, which has been shown to improve type 1 diabetes (T1D) management. However, most existing models can only provide single-horizon prediction and face a variety of real-world challenges, such as lacking hardware implementation and interpretability. In this work, we introduce a new deep learning framework, the edge-based temporal fusion Transformer (E-TFT), for multi-horizon BG prediction, and implement the trained model on a customized wristband with a system on a chip (Nordic nRF52832) for edge computing. E-TFT employs a self-attention mechanism to extract long-term temporal dependencies and enables post-hoc explanation for feature selection. On a clinical dataset with 12 T1D subjects, it achieved a mean root mean square error of 19.09 ± 2.47 mg/dL and 32.31 ± 3.79 mg/dL for 30 and 60-minute prediction horizons, respectively, and outperformed all the considered baseline methods, such as N-BEATS and N-HiTS. The proposed model is effective for multi-horizon BG prediction and can be deployed on wearable devices to enhance T1D management in clinical settings.
Taiyu Zhu, Junming Zeng, Kezhi Li, Pantelis Georgiou
ISCAS4
2021 A USB 3.0 High Speed Digital Readout System with Dynamic Frame Rate Processing for ISFET Lab-on-Chip Platforms
abstract
This paper presents a USB 3.0 based readout platform for real-time ion imaging applications. The front end utilizes an ion-imaging array containing 16 k ISFET pixels to capture ion diffusion at 6100 fps. Operating at 200 MHz, the chip streams ion information at a data rate of 762.94 Mb/s. The backend readout system employs a FIFO-to-USB bridge (FT601Q) that supports Super Speed (5Gbps) to perform real-time data streaming and operates in bulk transfer mode to ensure data integrity. Implemented on a Xilinx Virtex UltraScale+ FPGA, the system involves a high-throughput data path through the on-board DDR4 SDRAMs, based on which a ring buffer is designed to provide the 2 GB buffering capacity. The readout system can operate in real time regardless of the USB glitches encountered on the Windows OS when involving data polling. In addition, a simple differencing algorithm with threshold detection is integrated into the back end for dynamic frame rate operation. The proposed readout system performs real-time ion imaging at high speed as well as streams the collected images for visualization within a latency of 25 ms, achieving state-of-the-art performance for high-speed Lab-on-Chip applications.
Junming Zeng, Pantelis Georgiou
ISCAS2
2021 A 1000fps Programmable Gain CMOS ISFET SoC with Array-Level Offset Compensation for Real Time Ion Imaging
abstract
This paper presents a novel Lab-on-Chip ion imaging platform with programmable gain and array-level offset compensation. An array of 128 × 128 ISFET pixels are employed as the sensing front end, followed by a two-step column parallel readout circuit. The offset introduced by trapped charge and drift before any chemical event, is stored and fed back to the programmable gain instrumentation amplifier for compensation and signal amplification. A column-parallel 8-bit single slope ADC and 8-bit R-2R DAC are designed to achieve real-time array-level correlated double sampling, which also enables new possibilities to maximise sensitivity using off-chip image processing techniques. The system operates in real-time at a frame rate of up to 1000fps, with a maximum effective sensitivity of 1V/pH. Designed in TSMC 0.18 BCD process, the chip occupies a die area of 2.3 mm × 4.5 mm. We anticipate that this work would become a next generation solution for revealing inperceptible ion interactions in various biomedical applications.
Junming Zeng, Pantelis Georgiou
ISCAS1
2021 Blood Glucose Prediction in Type 1 Diabetes Using Deep Learning on the Edge
abstract
Real-time blood glucose (BG) prediction can enhance decision support systems for insulin dosing such as bolus calculators and closed-loop systems for insulin delivery. Deep learning has been proven to achieve state-of-the-art performance in BG prediction. However, it is usually seen as a very computationally expensive approach, hence difficult to implement in wearable medical devices such as transmitters in continuous glucose monitoring (CGM) systems. In this work, we introduce a novel deep learning framework to predict BG levels with the edge inference on a microcontroller unit embedded in a low- power system. By using glucose measurements from a CGM sensor and a recurrent neural network that builds on long-short term memory, the personalized models achieves state-of-the-art performance on a clinical data set obtained from 12 subjects with T1D. In particular, the proposed method achieves an average root mean square error of 19.10 ± 2.04 for a 30-minute prediction horizon (PH) and 32.61 ± 3.45 for a 60-minute PH with high clinical accuracy. Notably, the framework has been optimized to achieve a minimum use of hardware resources (34KB FLASH and 1KB SRAM) as well as an execution time of 22 ms for low power operations (8 μW). The presented system has the potential to be implemented in wearable medical devices for diabetes care (CGM and insulin pumps) and to be integrated within an Internet of Things platform.
Taiyu Zhu, Kezhi Li, Junming Zeng, Pau Herrero, Pantelis Georgiou
ISCAS4
2020 High-Throughput Digital Readout System for Real-Time Ion Imaging using CMOS ISFET Arrays
abstract
This paper demonstrates a novel readout platform for ISFET-based ion imagers which is capable of performing high-throughput data acquisition and real-time monitoring on high-speed chemical reactions. The front end employs a 128×128 array of integrated ISFET pH sensors fabricated in unmodified CMOS process. The array operates at a frame rate of up to 3000 fps for detecting hydrogen ion diffusion, generating a maximum data stream of 491.52 Mbps. A digital readout system consisting of a readout module for data buffering, an AXI master controller for accessing on-board DDR3 memory and a PCIe subsystem for transmitting data packets is implemented on an Alinx AX7103 development board to link the chip and the PC. The platform capabilities are demonstrated with a real-time ion imaging experiment, by observing the diffusion of NaOH pills in water within 320 ms, visualized on screen with a latency of 0.15 s. Lastly, different image processing algorithms including Gaussian, Bilateral and Non-local Mean are evaluated for noise reduction and an accelerator for the optimum filter is implemented for real-time ion-imaging.
Junming Zeng, Pantelis Georgiou
ISCAS2
2019 Current-Mode ISFET Array with Row-Parallel ADCs for Ultra-High Speed Ion Imaging
abstract
This paper presents a fully integrated system-on-chip for ultra-high frame rate ion-imaging using a pH-sensing ISFET array. Linear pH-to-current conversion is achieved by operating the ISFET in velocity saturation which guarantees that the ion concentration in the chemical solution is linearly transduced to the output of the sensor. Implemented in a 3-Transistor (3-T) pixel for compactness, the ISFET also consists of a reset switch to compensate for sensor non-ideal effects such as trapped charge and drift. High speed readout is achieved using a current-mode signal processing pipeline while auto-zeroing is employed to reduce fixed pattern noise. The sensing array comprises 128 × 128 pixels and every row shares its own readout circuit followed by 128 row-parallel 1MS/sec single slope ADCs. Designed in standard TSMC 180nm CMOS process, the chip achieves 7800fps with 16k pixels and a silicon area of 2mm × 2mm, which is the fastest ISFET array reported in literature.
Junming Zeng, Pantelis Georgiou
ISCAS1
2018 A 128×128 Current-Mode Ultra-High Frame Rate ISFET Array for Ion Imaging
abstract
This paper presents a 128 × 128 ISFET array with current mode readout peripherals for real-time ion imaging. Current-mode operation is employed to achieve very high speed and frame rate and provide a linear mapping between the ion concentration at the sensing layer (typically hydrogen ions - pH) to the drain current of the device. To this effect, a single device biased in the triode region can serve as both the sensing and readout device in the pixel ensuring a very small area footprint per pixel. Compensating for known non-ideal effects of the ISFET, namely trapped charge and drift, is implemented by resetting the gate voltage whereas any additional circuit offsets are eliminated by auto-zeroing. Auto-zeroing and sampling takes place on a row-parallel basis which is then multiplexed to 8 current mode ADCs. The chip is designed in a standard 0.35um CMOS process, occupies an area of 2.6mm × 2.2mm and can achieve a frame rate of 3000 fps which is the highest in this process node. We anticipate that the proposed system will increase the current temporal limit of detection of chemical reactions and provide new insight into real-time ion dynamics.
Junming Zeng, Nicholas Miscourides, Pantelis Georgiou
ISCAS1