In this work, we developed a highly memory-efficient, accurate table model that is 10X+ faster than its analytical counterparts: BSIN3/4 models. Speed derives from linear interpolation; accuracy and memory efficiency result from the unstructured grid founded on a BSP tree for discretizing the device function space. We also describe a methodology invoked during table generation to overcome the non-monotonic device behavior that results from interpolating the unstructured grid; the method preserves both continuity and monotonicity of the device quantities. These table models are now implemented in our production circuit simulator, TISpice. Overall speedups of 1.8X to 4.8X were observed on suites of industry circuits.

Self-heating effects in bipolar junction transistors (BJTs) have been incorporated into PSpice DC and AC analyses. The effects are intrinsic to the operation of the transistor, and are treated within the device model, avoiding the need for thermal subcircuits. A physical thermal impedance model is provided, which allows prediction of the thermal impedance for devices with rectangular emitters from device geometry. A simple approximation is used to predict thermal frequency response. The predictive model can be overridden by measured thermal model parameters. The modifications made to the PSpice code are presented, along with some discussion of implementation alternatives. An example simulation is presented, demonstrating the significance of thermal effects in a typical circuits. Run-time comparisons show that the modified code is about half the speed of unmodified PSPice, mostly because of slower convergence. It is believed that this performance can be improved with suggested implementation changes.>