A general purpose Cellular Array Processor(CAP) with distributed frame buffers for fast parallel subimage generation has been developed. CAP consists of many processor elements called cells. A cell has video memory for subimage storage, a window controller to map each subimage to an area on the monitor screen, and communication devices, in addition to ordinary microcomputer components such as MPU, RAM, and ROM. Image data in a cell is directly displayed via the video bus. The mapping pattern and the position on the screen of subimages can be changed dynamically. Various hidden surface algorithms can be implemented in CAP using mapping patterns appropriate for the algorithm.Our goal is an efficient interactive visual solid modeler. We adopted a general CSG hidden surface algorithm that enables display of both Boundary representation and Constructive Solid Geometry. A technique for hidden surface removal of general CSG models, requiring less memory space for large models in many cases, has been proposed. This technique subdivides the model into submodels by dividing the CSG tree at union nodes. Imagse of each submodel are generated by a CSG or a z-buffer algorithm. If a submodel is just a primitive, it is processed by the z-buffer algorithm, otherwise by the CSG algorithm. Hidden surface removal between submodels is done by comparing the z values for each pixel which are saved in the z-buffer.

The advanced computer aided design system, ICAD/PCB, was recently put into operation at Fujitsu. The system provides designers with powerful tools to significantly lower the cost and the time required to design and manufacture printed circuit boards (PCBs). Interactive and automatic facilities to support the entire PCB design process are integrated in the ICAD/PCB system.