Demo Data from EDBT 2026 / reviewers in the wild / expert
Sangchul Kim
dblp:47/3818
· DBLP profile ↗
12ranked-venue papers
6as first author
1since 2021 · last 2021
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Databases, data management, data science and information retrieval · 7 · 6 first-author · 1 since 2021Systems, architecture and hardware · 3Artificial intelligence and machine learning · 2 · 2 first-authorHuman-computer interaction and ubiquitous computing · 2Applied, interdisciplinary, general and emerging computing · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Storage systems · 40% Memory systems · 40% High-performance computing · 14% | |
| Databases, data mining, and information retrieval
2 papers |
Distributed and cloud data management · 94% Transaction processing and concurrency control · 6% |
Topics — the 14 heaviest of 15, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Distributed and cloud data management
array processing |
0.5 | 1 | 2021 | Spangle: A Distributed In-Memory Processing System for Large-Scale Arrays · ICDE 2021 |
Distributed and cloud data management › distributed analytics
distributed in-memory analytics |
0.5 | 1 | 2021 | Spangle: A Distributed In-Memory Processing System for Large-Scale Arrays · ICDE 2021 |
Storage systems
flash and SSD |
0.2 | 1 | 2015 | SQLite Optimization with Phase Change Memory for Mobile Applications · Proc. VLDB Endow. 2015 |
Memory systems
non-volatile memory |
0.2 | 1 | 2015 | SQLite Optimization with Phase Change Memory for Mobile Applications · Proc. VLDB Endow. 2015 |
Memory systems › non-volatile memory
phase change memory |
0.2 | 1 | 2015 | SQLite Optimization with Phase Change Memory for Mobile Applications · Proc. VLDB Endow. 2015 |
Storage systems › flash and SSD
write amplification reduction |
0.2 | 1 | 2015 | SQLite Optimization with Phase Change Memory for Mobile Applications · Proc. VLDB Endow. 2015 |
High-performance computing
scientific data analysis |
0.1 | 1 | 2021 | Spangle: A Distributed In-Memory Processing System for Large-Scale Arrays · ICDE 2021 |
Transaction processing and concurrency control › transaction models
mobile transactions |
0.1 | 1 | 2015 | SQLite Optimization with Phase Change Memory for Mobile Applications · Proc. VLDB Endow. 2015 |
Electronic design automation › logic synthesis › circuit optimization
area-delay optimization |
0.0 | 1 | 1995 | A path-oriented algorithm for the cell selection problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation › logic synthesis › technology mapping
cell selection |
0.0 | 1 | 1995 | A path-oriented algorithm for the cell selection problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation › logic synthesis
circuit optimization |
0.0 | 1 | 1995 | A path-oriented algorithm for the cell selection problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1995 | A path-oriented algorithm for the cell selection problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995 |
Electronic design automation
hardware description language |
0.0 | 1 | 1990 | An Object-Oriented VHDL Design Environment · DAC 1990 |
Electronic design automation › hardware description language
VHDL |
0.0 | 1 | 1990 | An Object-Oriented VHDL Design Environment · DAC 1990 |
Methods — techniques the papers use, named apart from their topics
mapreduce · 1.0RDD · 1.0per-page logging · 0.4heuristic path-oriented algorithm · 0.0cloning · 0.0NP-completeness proof · 0.0object-oriented modeling · 0.0constraint checking · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | Spangle: A Distributed In-Memory Processing System for Large-Scale ArraysabstractWith increasing volumes of scientific data, a scalable and parallel computing framework is required for scientific analysis in computer simulations and experiments. Scientific data are commonly generated in multi-dimensional arrays, and the array data model is appropriate to store them for analysis, including for data mining and arithmetic computation. In this paper, we introduce an array processing system called Spangle. It is implemented on top of Apache Spark, a popular map-reduce framework for complex computation workloads. To support array data computation, we extended Resilient Distributed Dataset (RDD) based on the array data model named ArrayRDD. ArrayRDD is an inherently parallel data structure that provides fault-tolerance. In addition, by adopting the array data model, Spangle provides an interface for expressing machine learning algorithms, which heavily rely on linear algebra. We tailored two popular algorithms, PageRank and Stochastic Gradient Descent, for large-scale datasets in Spangle. Sangchul Kim, Bogyeong Kim, Bongki Moon |
ICDE | 1 |
| 2018 | Federated database system for scientific dataabstractMuch like traditional databases, scientific data are managed in multiple separate databases by different sources and organizations. When such distributed data are analyzed together for more comprehensive understanding and prediction, it is necessary to access data via multiple simultaneous connections or collected in a single location. The inevitable consequence is, however, that a significant overhead is incurred due to differences in schemas, data transformation, and extraneous cost for storing intermediate data. This demo presents SDF, Scientific Database in Federation, which facilitates data sharing and exchange in order to support complex analytics with minimal integration overhead. SDF is currently implemented in SciDB using user-defined operators, providing two connection models, master-to-master and cluster-to-master, for a shared-nothing architecture. Sangchul Kim, Bongki Moon |
SSDBM | 1 |
| 2018 | fFTP: a fast file transfer protocol for home N-screen platform
Doowon Kim, Jinsuk Baek, Paul S. Fisher, Sangchul Kim |
Pers. Ubiquitous Comput. | 4 |
| 2017 | Scalable parallel data loading in SciDBabstractSciDB is an array-based DBMS popularly used for scientific data analysis. One major hurdle in processing large-scale scientific data is pre-processing before loading data, which includes extraneous file conversion from a raw data format to a software-specific format, which causes a significant I/O overhead. Moreover, data loading is typically followed by array transformation, which requires data to be sorted and redistributed by hashing. In order to reduce the overhead, we streamline the conversion process and modify the distribution method in loading stages. In addition, we eliminate two heavy-duty steps, namely sort and redistribution, which account for a dominant portion of the redimensioning cost. Our experiments show that the data loading time can be reduced up to 65% compared with the vanilla loader of SciDB. Sangchul Kim, Junhee Lee 0003, Bongki Moon |
IEEE BigData | 1 |
| 2016 | Selective Scan for Filter Operator of SciDBabstractRecently there has been an increasing interest in analyzing scientific data generated by observations and scientific experiments. For managing these data efficiently, SciDB, a multi-dimensional array-based DBMS, is suggested. When SciDB processes a query with where predicates, it uses filter operator internally to produce a result array that matches the predicates. Most queries for scientific data analysis utilize spatial information. However, filter operator of SciDB reads all data without considering features of array-based DBMSs and spatial information. In this demo, we present an efficient query processing scheme utilizing characteristics of array-based data, implemented by employing coordinates. It uses a selective scan that retrieves data corresponding to a range that satisfies specific conditions. In our experiments, the selective scan is up to 30x faster than the original scan. We demonstrate that our implementation of the filter operator will reduce the processing time of a selection query significantly and enable SciDB to handle a massive amount of scientific data in more scalable manner. Sangchul Kim, Seoung Gook Sohn, Jinseon Yu, Bogyeong Kim, Bongki Moon |
SSDBM | 1 |
| 2016 | SBH: Super byte-aligned hybrid bitmap compression
Sangchul Kim, Junhee Lee 0003, S. Srinivasa Rao 0001, Bongki Moon |
Inf. Syst. | 1 |
| 2015 | SQLite Optimization with Phase Change Memory for Mobile ApplicationsabstractGiven its pervasive use in smart mobile platforms, there is a compelling need to optimize the performance of sluggish SQLite databases. Popular mobile applications such as messenger, email and social network services rely on SQLite for their data management need. Those mobile applications tend to execute relatively short transactions in the autocommit mode for transactional consistency in databases. This often has adverse effect on the flash memory storage in mobile devices because the small random updates cause high write amplification and high write latency. In order to address this problem, we propose a new optimization strategy, called per-page logging (PPL) , for mobile data management, and have implemented the key functions in SQLite/PPL. The hardware component of SQLite/PPL includes phase change memory (PCM) with a byte-addressable, persistent memory abstraction. By capturing an update in a physiological log record and adding it to the PCM log sector, SQLite/PPL can replace a multitude of successive page writes made to the same logical page with much smaller log writes done to PCM much more efficiently. We have observed that SQLite/PPL would potentially improve the performance of mobile applications by an order of magnitude while supporting transactional atomicity and durability. Gi-Hwan Oh, Sangchul Kim, Sang-Won Lee 0001, Bongki Moon |
Proc. VLDB Endow. | 2 |
| 2012 | Motion recognition with smart phone embedded 3-axis accelerometer sensorabstractAs the technology surrounding smart phone devices has changed over the past few years, we now find a device containing a collection of sensors. Indeed, one can say that the development of smart phones has been one of the most important advances in science and technology. We will show an additional usage for the smart phone: utilizing it for a generic, hardware, gaming controller. We will show how a motion recognition mechanism can be used for determining rate of change and position of the phone as it moves in 3D-space using the embedded 3-axes accelerometer sensor. Upon sensing a user's motions with the smart phone, the corresponding accelerometer values are transmitted to the gaming console through the Wi-Fi communication. Motion recognition is then performed at the gaming console using a pattern matching mechanism. The proposed mechanism is applied to the game of tennis to recognize three primary ground stroke motions: the forehand stroke, backhand stroke, and service. With individual calibration for these three motions, we show how accurately the system can recognize the motions, and derive ball-hit likelihood. These types of results, when fully realized, can provide a much richer and simpler experience for the user. Hyunju Cho, Sangchul Kim, Jinsuk Baek, Paul S. Fisher |
SMC | 2 |
| 1995 | A path-oriented algorithm for the cell selection problemabstractAn algorithm for the cell selection problem is presented. Given a network G of logic gates, the problem is to select a library cell for each gate such that the longest delay through G is at most T/sub max/ and the total area of selected cells is minimum. We first prove the strong NP-completeness of the problem if the circuit is a general acyclic graph. The proof implies that there exists no pseudopolynomial time algorithm unless P=NP. We next propose a path-oriented, heuristic algorithm that iteratively chooses paths of gates with delay larger than T/sub max/, and then selects cells for the paths. The set of paths chosen induces a series-parallel subgraph. We also present a cloning method which further improves a solution obtained by the path-oriented algorithm. In the proposed cloning method, nodes are duplicated into clones such that the resulting graph becomes a series-parallel graph. Our cloning method is more efficient in terms of time and space than the tree cloning of Chan (1990). The results of our algorithm are compared to those Lin et al. (1990). The algorithm provides significantly better solutions to all the circuits than the previous work.> Moon-Jung Chung, Sangchul Kim |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1991 | The Configuration Management for Version Control in an Object-Oriented VHDL Design EnvironmentabstractThe authors present a constraint-driven, object-oriented approach to configuration management within a VHDL design environment called SDE. A configuration is generated from a generic design in such a way that technology-specific cells are bound to the generic components of the design. In the approach, user-defined constraints are exploited to efficiently organize versions and to generate workable configurations. They are also used for providing the formal definitions of various relationships between cells, making it possible to easily explore versions of a configuration by substituting other cells with a certain relationship, e.g., replaceability, for its already bound cells. To retrieve cells that satisfy constraints for a configuration to be generated, the authors suggest an object-oriented query model based on a graph model.> Moon-Jung Chung, Sangchul Kim |
ICCAD | 2 |
| 1990 | An Object-Oriented VHDL Design EnvironmentabstractA system-level design environment (SDE) for the VHSIC hardware description language (VHDL) is presented. The object-oriented approach is used for modeling the VHDL entities, design constraints, and even design patterns. The data model and its internal schema, which are suitable for the VHDL semantics, are proposed. SDE allows a designer to reconfigure the designed schematic by binding its generic components to technology-specific ones. It is effectively used for version control. SDE verifies the design by dynamically checking the constraints. The standard VHDL is extended in order to represent the constraints properly. > Moon-Jung Chung, Sangchul Kim |
DAC | 2 |
| 1988 | Checking a Rule Base with Certainty Factor for Incompleteness and Inconsistency
Sangchul Kim |
IPMU | 1 |