A response property is a simple liveness property that, given state predicates p and q, asserts "whenever a p-state is visited, a g-state will be visited in the future". This paper presents an efficient and scalable implementation for explicit-state model of checking response properties on systems with strongly- and weakly-fair actions, using a network of machines. Our approach is a novel twist on the One-Way-Catch-Them-Young (OWCTY) algorithm. Although OWCTY has a worst-case time complexity of O(n2m) where n is the number of states of the model, and m is the number of fair actions, we show that in practice, the run-time is a very small multiple of n. This allows our approach to handle large models with a large number of fairness constraints. Our implementation builds upon PREACH, a distributed, explicit-state model checking tool. We demonstrate the effectiveness of our approach by applying it to several standard benchmarks on some real-world, proprietary, architectural models.

The performance of today's computers is limited primarily by power consumption rather than the number of instructions executed. Because the energy required to perform an operation using VLSI circuits drops rapidly with the time allowed for the operation, many slow processors can complete a parallel computation using less time and less energy than a fast uniprocessor that can execute the best sequential algorithm. This motivates designing algorithms for minimum execution time subject to energy constraints. We propose a simple model for analyzing algorithms that reflects the energy-time trade-offs of CMOS circuits. Using this model, we derive lower bounds for the energy-constrained execution time of sorting, addition, and multiplication, each with bitwise inputs, and we present algorithms that meet these bounds. These lower bounds are based on the energy-time costs of communication distance, rather than bisectional bandwidth arguments typical of area-time lower bounds. We show that minimizing time under energy constraints is not the same as minimizing operation count or computation depth. This work establishes a tractable method for the evaluation of parallel computations in a power-constrained environment.

Power consumption has become one of the most critical concerns for processor design. This motivates designing algorithms for minimum execution time subject to energy constraints. We propose simple models for analysing algorithms that reflect the energy-time trade-offs of CMOS circuits. Using these models, we derive lower bounds for the energy-constrained execution time of sorting, addition and multiplication, and we present algorithms that meet these bounds. We show that minimizing time under energy constraints is not the same as minimizing operation count or computation depth.

We show that the problem of finding an energy minimal schedule for execution of a collection of jobs on a multiprocessor with job migration allowed has polynomial complexity. Each job is specified by a release time, a deadline, and an amount of work to be performed. All of the processors have the same, convex power-speed trade-off of the form P = phi(s), where P is power, s is speed, and phi is convex. Unlike previous work on multiprocessor scheduling, we place no restriction on the release times, deadlines, or amount of work to be done. We show that the scheduling problem is convex, and give an algorithm based on linear programming. We show that the optimal schedule is the same for any convex power-speed trade-off function.