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DeQing Chen

dblp:48/2520 · DBLP profile ↗
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6ranked-venue papers
2as first author
0since 2021 · last 2004
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Distributed systems · 43% Hardware reliability and fault tolerance · 31% Memory systems · 27%
Software engineering, system software, and programming languages
1 paper
Operating systems · 50% Runtime systems and virtual machines · 50%

Topics — the 5 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance
soft errors
0.012004
Susceptibility of Commodity Systems and Software to Memory Soft Errors · IEEE Trans. Computers 2004
Distributed systems › middleware
distributed computing middleware
0.012003
Exploiting high-level coherence information to optimize distributed shared state · PPoPP 2003
Memory systems › shared memory
distributed shared memory
0.012003
Exploiting high-level coherence information to optimize distributed shared state · PPoPP 2003
Distributed systems › communication optimization
communication load reduction
0.012003
Exploiting high-level coherence information to optimize distributed shared state · PPoPP 2003
Distributed systems › distributed application development
distributed application optimization
0.012003
Exploiting high-level coherence information to optimize distributed shared state · PPoPP 2003

Methods — techniques the papers use, named apart from their topics

workload characterization · 0.1fault injection · 0.1spatial view partitioning · 0.0dynamic coherence requirement specification · 0.0
YearPublicationVenuePosition
2004 Integrating Remote Invocation and Distributed Shared State
abstract
Summary form only given. Most distributed applications require, at least conceptually, some sort of shared state: information that is nonstatic but mostly read, and needed at more than one site. At the same time, RPC-based systems such as Sun RPC, Java RMl, CORBA, and .NET have become the de facto standards by which distributed applications communicate. As a result, shared state tends to be implemented either through the redundant transmission of deep-copy RPC parameters or through ad-hoc, application-specific caching and coherence protocols. The former option can waste large amounts of bandwidth; the latter significantly complicates program design and maintenance. To overcome these problems, we propose a distributed middleware system that works seamlessly with RPC-based systems, providing them with a global, persistent store that can be accessed using ordinary reads and writes. Relaxed coherence models and aggressive protocol optimizations reduce the bandwidth required to maintain shared state. Integrated support for transactions allows a chain of RPC calls to update shared state atomically. We focus on the implementation challenges involved in combining RPC with shared state and transactions. In particular, we describe a transaction metadata table that allows processes inside a transaction to share data invisible to other processes and to exchange data modifications efficiently. Using microbenchmarks and a large-scale datamining application, we demonstrate how the integration of RPC, transactions, and shared state facilitates the rapid development of robust, maintainable code.
Chunqiang Tang, DeQing Chen, Sandhya Dwarkadas, Michael L. Scott
IPDPS2
2004 Susceptibility of Commodity Systems and Software to Memory Soft Errors
abstract
It is widely understood that most system downtime is accounted for by programming errors and administration time. However, a growing body of work has indicated an increasing cause of downtime may stem from transient errors in computer system hardware due to external factors, such as cosmic rays. This work indicates that moving to denser semiconductor technologies at lower voltages has the potential to increase these transient errors. In this paper, we investigate the susceptibility of commodity operating systems and applications on commodity PC processors to these soft-errors and we introduce ideas regarding the improved recovery from these transient errors in software. Our results indicate that, for the Linux kernel and a Java virtual machine running sample workloads, many errors are not activated, mostly due to overwriting. In addition, given current and upcoming microprocessor support, our results indicate that those errors activated, which would normally lead to system reboot, need not be fatal to the system if software knowledge is used for simple software recovery. Together, they indicate the benefits of simple memory soft error recovery handling in commodity processors and software.
Alan Messer, Philippe Bernadat, Guangrui Fu, DeQing Chen, Zoran Dimitrijevic, David Jeun Fung Lie, Durga Mannaru, Alma Riska, Dejan S. Milojicic
IEEE Trans. Computers4
2003 Efficient Distributed Shared State for Heterogeneous Machine Architectures
abstract
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across heterogeneous platforms. As a complement to RPC-based systems such as CORBA, .NET and Java RMI, InterWeave allows processes to access shared data using ordinary reads and writes. Experience indicates that InterWeave-style sharing facilitates the rapid development of distributed applications, and enhances performance through transparent caching of state. In this paper we focus on the aspects of InterWeave specifically designed to accommodate heterogeneous machine architectures. Beyond the traditional challenges of message-passing in heterogeneous systems, InterWeave (1) identifies and tracks data changes in the face of relaxed coherence models, (2) employs a wire format that captures not only data but also diffs in a machine and language-independent form, and (3) swizzles pointers to maintain long-lived (cross-call) address transparency. To support these operations, InterWeave maintains an extensive set Of metadata structures, and employs a variety of performance optimizations. Experimental results show that InterWeave achieves performance comparable to that of RPC parameter passing when transmitting previously uncached data. When updating data that have already been cached, InterWeave's use of platform-independent diffs allows it to significantly outperform the straightforward use of RPC.
Chunqiang Tang, DeQing Chen, Sandhya Dwarkadas, Michael L. Scott
ICDCS2
2003 Exploiting high-level coherence information to optimize distributed shared state
abstract
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating systems, and programming languages. As a complement to RPC/RMI, InterWeave facilitates the rapid development of maintainable code by allowing processes to access shared data using ordinary reads and writes.Internally, InterWeave employs a variety of aggressive optimizations to obtain significant performance improvements with minimal programmer effort. In this paper, we focus on application-specific optimizations that exploit dynamic high-level information about an application's spatial data access patterns and the stringency of its coherence requirements. Using applications drawn from computer vision, datamining, and web proxy caching, we illustrate the specification of coherence requirements based on the (temporal) concept of "recent enough" to use, and introduce two (spatial) notions of views, which allow a program to limit coherence management to the portion of a data structure actively in use. Experiments with these applications show that InterWeave can reduce their communication traffic by up to one order of magnitude with minimum effort on the part of the application programmer.
DeQing Chen, Chunqiang Tang, Brandon Sanders, Sandhya Dwarkadas, Michael L. Scott
PPoPP1
2002 Towards a Distributed Platform for Resource-Constrained Devices
abstract
Many visions of the future predict a world with pervasive computing, where computing services and resources permeate the environment. In these visions, people will want to execute a service on any available device without worrying about whether the service has been tailored for the device. We believe that it will be difficult to create services that can execute well on the wide variety of devices that are being developed because of problems with diversity and resource constraints. We believe that these problems can be greatly reduced by using an ad-hoc distributed platform to transparently off-load portions of a service from a resource-constrained device to a nearby server. We implemented a preliminary prototype and emulator to study this approach. Our experiments show the beneficial use of nearby resources to relieve both memory and processing constraints, when it is appropriate to do so. We believe that this approach will reduce the burden on developers by masking more device details.
Alan Messer, Ira Greenberg 0002, Philippe Bernadat, Dejan S. Milojicic, DeQing Chen, Thomas J. Giuli, Xiaohui Gu
ICDCS5
2002 Multi-Level Shared State for Distributed Systems
abstract
As a result of advances in processor and network speeds, more and more applications can productively be spread across geographically distributed machines. In this paper we present a transparent system for memory sharing, InterWeave, developed with such applications in mind. InterWeave can accommodate hardware coherence and consistency within multiprocessors (level-1 sharing), software distributed shared memory (S-DSM) within tightly coupled clusters (level-2 sharing), and version-based coherence and consistency across the Internet (level-3 sharing). InterWeave allows processes written in multiple languages, running on heterogeneous machines, to share arbitrary typed data structures as if they resided in local memory. Application-specific knowledge of minimal coherence requirements is used to minimize communication. Consistency information is maintained in a manner that allows scaling to large amounts of shared data. In C, operations on shared data, including pointers, take precisely the same form as operations on non-shared data. We demonstrate the ease of use and efficiency of the system through an evaluation of several applications. In particular, we demonstrate that InterWeave's support for sharing at higher (more distributed) levels does not reduce the performance of sharing at lower (more tightly coupled) levels.
DeQing Chen, Chunqiang Tang, Xiangchuan Chen, Sandhya Dwarkadas, Michael L. Scott
ICPP1