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J. Calvo

dblp:48/2963 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1986
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
asynchronous circuit design		 0.011986
Asynchronous Modular Arbiter · IEEE Trans. Computers 1986
Integrated circuit design
metastability		 0.011986
Asynchronous Modular Arbiter · IEEE Trans. Computers 1986

Methods — techniques the papers use, named apart from their topics

modular design · 0.0
YearPublicationVenuePosition
1986 Asynchronous Modular Arbiter
abstract
A practical N-user arbiter and its implementation are presented in this correspondence. Because of the asynchronous character of its input variables (request signals), the design proposed is asynchronous and keeps in mind the possibility of metastable operations. The structure of the arbiter is very simple and modular.
J. Calvo, José I. Acha, Manuel Valencia-Barrero
 IEEE Trans. Computers1