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Ashok D. Ingle

dblp:48/4599 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1976
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › redundancy
hybrid redundancy
0.011976
A Reliability Model for Various Switch Designs in Hybrid Redundancy · IEEE Trans. Computers 1976
Hardware reliability and fault tolerance
redundancy
0.011976
A Reliability Model for Various Switch Designs in Hybrid Redundancy · IEEE Trans. Computers 1976
Hardware reliability and fault tolerance
reliability modeling
0.011976
A Reliability Model for Various Switch Designs in Hybrid Redundancy · IEEE Trans. Computers 1976
Hardware reliability and fault tolerance › redundancy › modular redundancy
triple modular redundancy
0.011976
A Reliability Model for Various Switch Designs in Hybrid Redundancy · IEEE Trans. Computers 1976

Methods — techniques the papers use, named apart from their topics

reliability modeling · 0.0
YearPublicationVenuePosition
1976 A Reliability Model for Various Switch Designs in Hybrid Redundancy
abstract
Various switch designs for the hybrid redundancy scheme are studied. A reliability model for the switch is developed and the switch is shown to be a significant factor in the overall system reliability. A hybrid redundancy scheme with a triple-modular redundant (TMR) core may have a maximum attainable reliability for only a spare or two. Adding spares complicates the switch enough to cause the system reliability to actually decrease. There exist conditions under which the switch becomes so complex that simple TMR would yield a better solution. Models for fault-tolerant switch designs are also obtained. Finally, various designs are compared via their reliability models.
Ashok D. Ingle, Daniel P. Siewiorek
IEEE Trans. Computers1