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Jan Gecsei

dblp:48/6182 · DBLP profile ↗
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17ranked-venue papers
4as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 3 first-authorDatabases, data management, data science and information retrieval · 3Human-computer interaction and ubiquitous computing · 3Graphics, computer vision, multimedia, augmented reality and games · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
8 papers
Electronic design automation · 43% Interconnection networks and networks-on-chip · 22% Hardware reliability and fault tolerance · 12%
Databases, data mining, and information retrieval
2 papers
Information retrieval · 76% Machine learning and data management · 24%
Artificial intelligence
1 paper
Knowledge representation and reasoning · 100%

Topics — the 21 heaviest of 24, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems
fault tolerance
0.011994
Fault Tolerance in a Class of Sorting Networks · IEEE Trans. Computers 1994
Hardware reliability and fault tolerance
fault-tolerant design
0.011994
Fault Tolerance in a Class of Sorting Networks · IEEE Trans. Computers 1994
Interconnection networks and networks-on-chip
sorting network
0.011994
Fault Tolerance in a Class of Sorting Networks · IEEE Trans. Computers 1994
Electronic design automation › circuit simulation
switch-level simulation
0.031987
Self-Adjusting Networks for VLSI Simulation · IEEE Trans. Computers 1987
Simulation of MOS Circuits by Decision Diagrams · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985
An object-oriented swicth-level simulator · DAC 1985
Electronic design automation
hardware verification and test
0.021988
Functional Description of Connector-Switch-Attenuator Networks · IEEE Trans. Computers 1988
An object-oriented swicth-level simulator · DAC 1985
Knowledge, reasoning and agents › Knowledge representation and reasoning › knowledge acquisition
knowledge base construction
0.011990
Structuring Knowledge Bases Using Automatic Learning · ICDE 1990
Information retrieval › interactive information retrieval › browsing
browsing interface
0.011989
Design of a Browsing Interface for Information Retrieval · SIGIR 1989
Information retrieval › query reformulation
query refinement
0.011989
Design of a Browsing Interface for Information Retrieval · SIGIR 1989
Information retrieval
search interfaces
0.011989
Design of a Browsing Interface for Information Retrieval · SIGIR 1989
Electronic design automation › hardware verification and test
formal verification
0.011988
Functional Description of Connector-Switch-Attenuator Networks · IEEE Trans. Computers 1988
Integrated circuit design › digital circuit design
MOS circuits
0.011988
Functional Description of Connector-Switch-Attenuator Networks · IEEE Trans. Computers 1988
Interconnection networks and networks-on-chip
network topology
0.031981
The Topology of Cellular Partitioning Networks · IEEE Trans. Computers 1981
Path Building in Cellular Partitioning Networks · ISCA 1980
Interconnection Networks from Three-State Cells · IEEE Trans. Computers 1977
Interconnection networks and networks-on-chip › switching network
multistage interconnection network
0.021994
Fault Tolerance in a Class of Sorting Networks · IEEE Trans. Computers 1994
Interconnection Networks from Three-State Cells · IEEE Trans. Computers 1977
Electronic design automation › hardware verification and test
hardware verification
0.011987
Self-Adjusting Networks for VLSI Simulation · IEEE Trans. Computers 1987
Electronic design automation › circuit simulation › device and circuit simulation
MOS circuit simulation
0.011987
Self-Adjusting Networks for VLSI Simulation · IEEE Trans. Computers 1987
Integrated circuit design › large-scale integration
VLSI circuits
0.011987
Self-Adjusting Networks for VLSI Simulation · IEEE Trans. Computers 1987
Electronic design automation
circuit simulation
0.011985
Simulation of MOS Circuits by Decision Diagrams · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985
Electronic design automation › logic synthesis
decision diagrams
0.011985
Simulation of MOS Circuits by Decision Diagrams · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985
Information retrieval › retrieval models
boolean retrieval
0.011989
Design of a Browsing Interface for Information Retrieval · SIGIR 1989
Information retrieval
retrieval models
0.011989
Design of a Browsing Interface for Information Retrieval · SIGIR 1989
Integrated circuit design › digital circuit design
switching circuits
0.011977
Interconnection Networks from Three-State Cells · IEEE Trans. Computers 1977

Methods — techniques the papers use, named apart from their topics

machine learning · 0.0generalization inference · 0.0decision diagrams · 0.0formal concept lattice · 0.0fisheye views · 0.0characteristic functions · 0.0magnitude networks · 0.0local controllers · 0.0object-oriented modeling · 0.03-state automaton · 0.0graph-theoretic analysis · 0.0network synthesis · 0.0
YearPublicationVenuePosition
1998 Meta-Data Modeling for Quality of Service (QoS) Management in the World Wide Web (WWW)
abstract
The World-Wide Web has been a remarkably successful system for distributing hypertext documents. The basic model for Web interaction is that a client requests a page of data which can include images and hyperlinks within it. This interaction model is inadequate for real-time multimedia (MM) applications, since the Web and its associated set of protocols, e.g. HTTP, do not support the real-time transfer of the continuous media (Audio/Video). Several solutions have been proposed to support real-time playout of continuous media via the Web, e.g. Netscape. Most of these solutions do not provide means to the user to negotiate the desired presentation quality (in terms of quality of service (QoS) parameters settings); even the proposals that provide QoS negotiation (more generally QoS management) are used in a rather static manner, that is, the video/audio servers are a priori known. The authors propose to integrate in the WWW a dynamic QoS management approach that allows (1) the user to negotiate the desired QoS; and (2) and to select the "best" video/audio server which might support the user requirements. This activity is based on the general structure of multimedia documents and associated QoS parameters, called meta-data, which they developed under an ongoing CITR project. The main objective of the paper is to integrate meta-data associated with MM document in WWW e.g. Netscape; this will allow one to use dynamic QoS management protocols.
Erika Madja, Abdelhakim Hafid, Rachida Dssouli, Gregor von Bochmann, Jan Gecsei
MMM5
1996 A Learning Environment for the Surgical Intensive Care Unit
Carmen Alexe, Jan Gecsei
Intelligent Tutoring Systems2
1994 Fault Tolerance in a Class of Sorting Networks
abstract
The early study of fault tolerance in efficient sorting networks only achieved single-fault tolerance. By eliminating critical comparators, L. Rudolph (1985) presented a 1-fault tolerant design of the balanced sorting network (BSN) at the cost of one redundant stage of N/2 comparators and two permuters external to the network. In this paper, we show, however, that 1-fault tolerance of BSN can be achieved without introducing redundancy and external permuters. Furthermore, we provide solutions to the open question of how to achieve multiple-fault tolerance in BSN. We analyze the problem from a higher-level by introducing a new concept of critical stages, and find that all stages in previous designs are critical. A 2-fault tolerant design of BSN is then discovered after eliminating its critical stages. The new design has a similar network architecture (i.e., a multistage network with the output recirculated back to the input) and the same hardware cost as Rudolph's, but it has many distinguished features. The performance analysis shows that the new designs achieve much higher probabilities of correct sorting in the presence of faulty comparators than the previous reported designs.>
Jianli Sun, Eduard Cerny, Jan Gecsei
IEEE Trans. Computers3
1992 An Iconic Intention-Driven IOTS Environment
Claude Frasson, Marc Kaltenbach, Jan Gecsei, Jean-Yves Djamen
Intelligent Tutoring Systems3
1990 Structuring Knowledge Bases Using Automatic Learning
abstract
The need to add an automatic learning phase to the construction process of a knowledge base is stressed. This work introduces a new technique based on machine learning methodologies which automatically creates a particular knowledge representation structure called knowledge space, from which common generalizations of knowledge objects may be efficiently inferred. Also introduced are some of the improved and added processing capabilities made possible by this structure.>
Guy W. Mineau, Jan Gecsei, Robert Godin
ICDE2
1990 Fault-tolerance in balanced sorting networks
Jianli Sun, Jan Gecsei, Eduard Cerny
J. Electron. Test.2
1990 Improving computer interfaces by animation from videodisc
Jan Gecsei, Paul Girard
Vis. Comput.1
1989 Design of a Browsing Interface for Information Retrieval
abstract
In conventional Boolean retrieval systems, users have difficulty controlling the amount of output obtained from a given query. This paper describes the design of a user interface which permits gradual enlargement or refinement of the user's query by browsing through a graph of term and document subsets. This graph is obtained from a lattice automatically generated from the usual document-term relation. The major design features of the proposed interface are the integration of menu, fill-in the blank and direct manipulation modes of interaction within the “fisheye view” [Furnas, 1986] paradigm. A prototype user interface incorporating some of these ideas has been implemented on a microcomputer.
Robert Godin, Jan Gecsei, Claude Pichet
SIGIR2
1988 Functional Description of Connector-Switch-Attenuator Networks
abstract
The switch-level abstraction of digital MOS circuits has been used primarily in simulators. In formal verification, a functional description must be first extracted from the switch network. It is shown here how the theory of characteristic functions can be applied to analyze such networks and to extract their functional description.>
Eduard Cerny, Jan Gecsei
IEEE Trans. Computers2
1987 Self-Adjusting Networks for VLSI Simulation
abstract
Magnitude networks [1l, [2] have been used as a theoretical base for switch-level simulation of MOS VLSI circuits. We address in this paper the particular problem of evaluating the influence of switches in unknown state on the steady-state response of the network. A two-pass procedure based on local controllers attached to such switches is described and a hardware implementation is proposed which models magnitude networks as self-adjusting combinational circuits.
Jan Gecsei, Eduard Cerny
IEEE Trans. Computers1
1986 Lattice model of browsable data spaces
Robert Godin, Eugene Saunders, Jan Gecsei
Inf. Sci.3
1985 An object-oriented swicth-level simulator
abstract
The simulator described functions within an object-cell oriented design environment. Leaf and composite cells are treated as abstract data types (objects) and their definition within a design is recursive. The leaf cells are simulated at the switch level using a functional description of transistor groups in terms of decision diagrams. These diagrams are extracted during a preprocessing step.
C. Roy, Louis-Philippe Demers, Eduard Cerny, Jan Gecsei
DAC4
1985 Simulation of MOS Circuits by Decision Diagrams
abstract
This paper describes a novel approach to switch-level simulation of MOS circuits. The circuit is first partitioned into connector-switch networks CSN [4]. Then each CSN is represented in terms of a decision diagram DD, which is particularly suitable for use in simulators. The advantages of DD's are that they are based on a solid theory and they permit fast evaluation of the network's response to any input vector. The CSN's are coupled through a 3-state automaton representing charge wells associated with transistor gates.
Eduard Cerny, Jan Gecsei
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1981 The Topology of Cellular Partitioning Networks
abstract
Investigates generalizations of triangular permuting networks in two directions: the connecting power of cells and the network topology. The main result indicates that permuting, coupling, and partitioning capabilities can be obtained by using 2-, 3-, and 4-state cells, respectively, in a large class of network topologies.
Jan Gecsei, Jean-Paul Brassard
IEEE Trans. Computers1
1980 Path Building in Cellular Partitioning Networks
abstract
This paper presents a new method of obtaining couplings in networks.
Jean-Paul Brassard, Jan Gecsei
ISCA2
1979 Adaptation Algorithms for Binary Tree Networks
abstract
The automatic synthesis of Boolean switching functions by adaptive tree networks is discussed. The concept of heuristic responsibility, by means of which parts of a tree become specialized to certain subsets of input vectors, is explained. Applications to pattern recognition and optical character recognition (OCR) problems are described.
William W. Armstrong, Jan Gecsei
IEEE Trans. Syst. Man Cybern.2
1977 Interconnection Networks from Three-State Cells
abstract
A class of interconnection networks with n (even) terminals is considered where connections between any two terminals are possible. Synthesis of these networks is accomplished using 4-terminal, 3-state elementary switching cells. A network with a cell count growing as n1.7is described.
Jan Gecsei
IEEE Trans. Computers1