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Rajendar Koltur

dblp:50/2640 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2004
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 88% Energy-efficient computing · 12%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › branch prediction
branch confidence estimation
0.012004
Perceptron-Based Branch Confidence Estimation · HPCA 2004
Processor architecture and microarchitecture
branch prediction
0.012004
Perceptron-Based Branch Confidence Estimation · HPCA 2004
Energy-efficient computing › power management › fine-grain power management
pipeline gating
0.012004
Perceptron-Based Branch Confidence Estimation · HPCA 2004
Processor architecture and microarchitecture
speculative execution
0.012004
Perceptron-Based Branch Confidence Estimation · HPCA 2004

Methods — techniques the papers use, named apart from their topics

perceptron · 0.0
YearPublicationVenuePosition
2004 Perceptron-Based Branch Confidence Estimation
abstract
Pipeline gating has been proposed for reducing wasted speculative execution due to branch mispredictions. As processors become deeper or wider, pipeline gating becomes more important because the amount of wasted speculative execution increases. The quality of pipeline gating relies heavily on the branch confidence estimator used. Not much work has been done on branch confidence estimators since the initial work [6]. We show the accuracy and coverage characteristics of the initial proposals do not sufficiently reduce mis-speculative execution on future deep pipeline processors. In this paper, we present a new, perceptron-based, branch confidence estimator, which is twice as accurate as the current best-known method and achieves reasonable mispredicted branch coverage. Further, the output of our predictor is multi-valued, which enables us to classify branches further as "strongly low confident" and "weakly low confident". We reverse the predictions of "strongly low confident" branches and apply pipeline gating to the "weakly low confident" branches. This combination of pipeline gating and branch reversal provides a spectrum of interesting design options ranging from significantly reducing total execution for only a small performance loss, to lower but still significant reductions in total execution, without any performance loss.
Haitham Akkary, Srikanth T. Srinivasan, Rajendar Koltur, Yogesh Patil, Wael Refaai
HPCA3