This innovative practice paper describes the development of online undergraduate laboratories in electrical engineering as a work in progress. Our goal is to create electrical engineering labs for the online program that are equivalent to on-campus labs. Equivalence implies that labs support the same cognitive and affective learning outcomes for both on-campus and online students. We addressed this challenge by implementing labs that fall into three specific categories: (1) labs which have a hands-on component that was realized in the online program using student-owned hardware, (2) labs which involve a simulation experience or are supported by virtual reality environments and (3) virtual laboratories that allow remote access to high-value equipment using freely available web conferencing tools. Assessment data based on Accreditation Board for Engineering and Technology (ABET) student performance criteria and student course feedback confirm that the laboratories are effective and well-received by students.

A behavioral model of a 1.8-V, 6-bit flash analog-to-digital converter has been developed based on device parameters using the g/sub m//I/sub d/ methodology. This approach eliminates the need for recharacterization of blocks when device sizes are changed. Furthermore, the performance can be predicted with input only from device and process simulators eliminating the need for a circuit simulator and associated model parameters. Signal to noise plus distortion ratio and differential and integral nonlinearity are predicted and verified at lower resolution with a circuit simulator.

The authors review the limits of nanometer-scale gate electrode (nano-gate) fabrication. The technology to fabricate nano-gates has become increasingly important in recent years as the scaling limits of conventional electronic devices and the quantum effects of novel devices are investigated. Consistent with the technology used to fabricate virtually all of the smallest devices to date, the emphasis is on the resolution limits of electron beam lithography and associated ultrahigh resolution resists. Recent results of directly patterning SiO/sub 2/ with nanometer-scale resolution by e-beam exposure through a sacrificial layer are also presented. Because the high resistance normally associated with nanometer-scale electrodes seriously limits the performance of high-frequency devices, various techniques to reduce the gate resistance are compared.>

The authors describe some preliminary experimental results of quantum-effect modulation-doped field-effect transistors (MODFETs) with a variety of nanometer gate geometries. The gate geometries were such that various quantum wells and barriers were formed in the channel of the MODFETs through the field effect imposed by the novel gate structures, and the transport of the electrons was affected by resonant tunneling. The devices were fabricated using a combination of molecular beam epitaxy and electron beam lithography. Electrical measurements of the devices at 4.2 K showed resonant tunneling effects and, in particular, showed that resonant tunneling is more pronounced for a system of quantum wells confined in three dimensions than in two. For these quantum effects to be appreciable at practical temperatures, about 77 K, the feature size of the gate geometries should be smaller than 50 nm.>