Abstract In the context of certain specific digital communication systems, where there are limitations such as spectral resources and energy availability, continuous phase modulation (CPM) emerges as an appealing choice among various modulation methods. Among CPM signals, multi‐h CPM is particularly noteworthy for its ability to address these constraints within the realm of single‐carrier and constant‐envelope waveforms. At the physical layer, the design of a multi‐h CPM receiver necessitates the efficient implementation of timing and frequency synchronization algorithm within a high dynamic environment. So this paper presents an innovative approach for achieving timing and frequency synchronization. To rectify timing offset and mitigate the adverse effects of noise in received signals, a re‐configurable local filter generation method is integrated into the timing synchronization algorithm. Simultaneously, an enhanced least mean square adaptive filter algorithm is applied to address frequency synchronization. A comprehensive series of simulations rigorously evaluates the outcomes of proposed novel synchronization methodology. These analyses demonstrate a notable proximity between the synchronization errors of proposed algorithm in this paper and the performance benchmark set by the modified Cramer–Rao bound. The proposed synchronization technology also exhibits the capability to substantially reduce the bit error rate, thereby effectively enhancing demodulation performance in multi‐h CPM receivers.

This paper presents a joint estimation and decoding algorithm for decoding over different impulsive noise in practical use, as the state of most impulsive noise changes rapidly in the wireless networks and cause performance degradation of low-density parity-check (LDPC) code decoding. The proposed algorithm fully utilizes the posteriori probability information of the decoding algorithm to strengthen estimation instead of regarding as the probability of input as equal probability. First, we derive the simplified objective of estimation expression. Then we designed the whole process of algorithm, which combines the estimator and decoder in an iterative manner. The simulation results show that the decoding performance of the proposed decoder can reach nearly known real noise parameters decoder within 0.1dB. Comparing with previous decoders, the proposed decoder has lower bit error rate (BER).

Belief Propagation (BP) decoding provides soft outputs and features high-level parallelism. In this paper, we propose an optimized software BP decoder for polar codes on graphics processing units (GPUs). A full-parallel decoding architecture for codes with length n ≤ 2048 is presented to simultaneously update n/2 processing elements (PEs) within each stage and achieve high on-chip memory utilization by using 8-bit quantization. And, for codes with length n > 2048, a partial-parallel decoding architecture is proposed to partly update PEs of each stage in parallel and coalesced global memory accesses are performed. Experimental results show that, with incorporation of the G-matrix based early termination criterion, more than 1 Gbps throughput for codes n ≤ 1024 can be achieved on NVIDIA TITAN Xp at 5 dB while the decoding latency is less than 1 ms. Compared with the state-of-the-art works, the proposed decoder achieves throughput speedups from 2.59× to 131× and provides good tradeoff between error performance and throughput.

This paper presents a novel scheme to construct a large class of high-rate low-density parity-check (LDPC) codes based on dual-diagonal matrix (DDM). After estimating the feasible sizes of the submatrices, we introduce two principles and two important parameters (interval and increment), based on which the parity-check matrices (PCMs) with 4-cycle free are constructed successfully. The designed PCMs can be used to generate high performance LDPC codes. Experiments confirm that the proposed scheme has better performance in waterfall and error floor region than the advanced LDPC coding methods. Our method can construct a large number of PCMs of similar decoding performance, which increases reliability and security during high speed communication.

In the wavelet packet threshold denoising algorithm, retaining as many of the original signal wavelet packet coefficients as possible is necessary while eliminating noise. Due to the lack of an adaptive parameter, the traditional soft and hard threshold functions cannot be adjusted adaptively, and the useful signal is always mixed with noise, which leads to insecurity of the Internet of Things (IoT) application. Therefore, this paper discusses the significance and feasibility of sample entropy as an adaptive parameter in the wavelet packet threshold function. Furthermore, a new threshold function is proposed to improve the traditional wavelet packet denoising algorithm. The algorithm can process the wavelet packet coefficients differently for different noise backgrounds to achieve better denoising effect, thereby improving the security of the IoT. The simulation results show that compared with the classical wavelet packet threshold function, the proposed improved algorithm achieves better denoising effect and is beneficial to enhance the security of IoT applications.

In this study, a segment‐selected mapping (SSLM) scheme is proposed to reduce the peak‐to‐average power ratio (PAPR) of the filter bank multi‐carrier (FBMC) signal in satellite communications. The standard selected mapping (SLM) scheme is suggested to reduce the PAPR of the traditional multi‐carrier signals. However, it cannot be directly applied to the FBMC signal due to the overlapping nature of the FBMC signal. In the proposed method, each symbol in the FBMC signal is divided into several segments to solve the overlapping problem. Each segment is regarded as an independent unit, and rotates a suitable phase to minimise the PAPR in the frequency domain. The authors simulated the FBMC signal in the satellite communications by introducing the influence of the high power amplifiers and the Doppler frequency shift. The simulation results from complementary cumulative distribution function of the PAPR show that the proposed scheme can achieve about 0.3 dB PAPR performance compared to the existing dispersive SLM scheme, with lower complexity.

Summary Nonbinary low‐density parity‐check (NB‐LDPC) codes are excellent error correcting codes and outperform their binary counterparts under the same code length. NB‐LDPC decoders are based on Belief Propagation Algorithm, which demands intensive message‐passing computation. Recently, to achieve both flexibility and good throughput performance, NB‐LDPC decoders have been ported from dedicated hardware solutions to multi/many‐core systems. In this paper, we propose an FFT‐based q‐ary Sum‐Product Algorithm (QSPA) decoding architecture for NB‐LDPC codes with layered and flooding schedules on a graphics processing unit (GPU). To improve the throughput performance of the proposed decoder, four optimization methods are presented to not only accelerate the decoding kernel execution but also improve the data transfer efficiency. The experiments are mainly accomplished on NVIDIA GTX580 and GTX Titan X. Throughputs up to 63 Mbps over GF(16) and 7.65 Mbps over GF(256) are achieved on GTX580 when executing 5 layered decoding iterations. Throughputs can reach up to 139 Mbps over GF(16) and17 Mbps over GF(256) on GTX Titan X. Experimental results show that the speedups of the decoding throughputs range from ×1.7 to ×16.8 by comparison with the existing FFT‐based QSPA decoders on GPU.

This paper tackles the problem of channel estimation and decoding in environments that exhibit time-varying block-memoryless impulsive noise. In order to perform the estimation in continuous value space and the decoding in discrete value space jointly, a novel message passing framework is proposed that combines the sampling-importance resampling (SIR) estimator and the LDPC sum-product decoder in an iterative manner. The resampling process within the framework is further improved based on the asymptotic performance analysis for mismatched decoding. The simulation results prove the validity of the enhanced SIR estimator in the proposed method and demonstrate our method can achieve better performance than the LDPC decoder with quantile estimator.

Recent advances in laser scanning technology have made it possible to faithfully scan a real object with tiny geometric details, such as pores and wrinkles. However, a faithful digital model should not only capture static details of the real counterpart but also be able to reproduce the deformed versions of such details. In this paper, we develop a data-driven model that has two components; the first accommodates smooth large-scale deformations and the second captures high-resolution details. Large-scale deformations are based on a nonlinear mapping between sparse control points and bone transformations. A global mapping, however, would fail to synthesize realistic geometries from sparse examples, for highly deformable models with a large range of motion. The key is to train a collection of mappings defined over regions locally in both the geometry and the pose space. Deformable fine-scale details are generated from a second nonlinear mapping between the control points and per-vertex displacements. We apply our modeling scheme to scanned human hand models, scanned face models, face models reconstructed from multiview video sequences, and manually constructed dinosaur models. Experiments show that our deformation models, learned from extremely sparse training data, are effective and robust in synthesizing highly deformable models with rich fine features, for keyframe animation as well as performance-driven animation. We also compare our results with those obtained by alternative techniques.