A summary of electrical and optical approaches to clock distribution within high-performance microprocessors is presented. System-level properties of intrachip electrical clock distribution networks corresponding to three microprocessor families are summarized. It is found that global clock interconnect performance and short-term jitter present the greatest challenges to the continued use of conventional clock distribution methodologies. An extrapolation of trends describing the percentage of clock period consumed by global skew and short-term jitter identifies the 32-nm technology generation of the 2002 International Technology Roadmap for Semiconductors (ITRS) as the first technology generation within which alternate methods of clock distribution may be warranted. Research efforts investigating interboard through intrachip optical clock distribution are also summarized. An optical distribution network compatible with high volume manufacturing in conjunction with a suitable means of providing optical-to-electrical signal conversion comprise the two fundamental challenges facing successful implementation of an optical clock distribution network. It is found that a global guided-wave distribution capable of efficient input and output coupling of optical power is required to meet the first challenge. The identification of a suitable means of optical-to-electrical conversion, however, remains an active topic of research.

The rapid advance of VLSI and packaging technologies has a significant impact on system architecture. In this paper, an analytical model is used to explore the design space of interconnection networks for a 4,096 node processing system incorporating multi-node chips packaged on a single MCM substrate. Possible designs are evaluated for a two-level interconnect with separate k-ary n-cube networks for intrachip and interchip communication. An analysis of the impact several architectural and technological parameters have on the optimal network implementation (based on average no-load latency) is presented.

Recent architectural and technological advances have led to the feasibility of a new class of massively parallel processing systems based on a fine-grain, message-passing computational model. These machines provide a new alternative for the development of fast, cost-efficient Maximum Likelihood-Expectation Maximization (ML-EM) algorithmic formulations. As an important first step in determining the potential performance benefits to be gathered from such formulations, we have developed an ML-EM algorithm suitable for the high-communications, low-memory (HCLM) execution model supported by this new class of machines. Evaluation of this algorithm indicates a normalized least-square error comparable to, or better than, that obtained via a sequential ray-driven ML-EM formulation and an effective speedup in execution time (as determined via discrete-event simulation of the Pica multiprocessor system currently under development at the Georgia Institute of Technology) of well over two orders of magnitude compared to current ray-driven sequential ML-EM formulations on high-end workstations. Thus, the HCLM algorithmic formulation may provide ML-EM reconstructions within clinical time-frames.

The bibliography has been compiled as an introduction and study guide to this field. The papers listed describe the extensive theoretical and experimental results that have been obtained on quantum interference effects and discuss possible application areas. Works of a fundamental nature concerning phenomena that are basic to all semiconductor behavior have not been included. Articles on the properties and band structure of semiconductors, which are essential to a complete understanding of quantum interference effects, have not been included. Conference papers, though frequently very important, have not been included to conserve space. The papers are listed alphabetically according to the first author's surname. As in the compilation of any bibliography, numerous valuable and pertinent articles have probably been inadvertently omitted.>

A comprehensive set of analogies between ballistic electron wave propagation in semiconductors (arbitrary kinetic energy and effective mass) and electromagnetic propagation in general dielectrics (arbitrary permittivity and permeability) is established. The expressions for electron wave propagation, reflection, and refraction are developed and shown to have the same functional form as in electromagnetics, if analogous definitions of electron wave phase and amplitude refractive indexes are used. The reflectivity characteristics such as total internal reflection (critical angle) and zero reflectivity (Brewster angle) are analyzed as a function of material parameters for both general dielectrics and semiconductor materials. The critical angle and Brewster angle results are then applied to electron wave propagation in Ga/sub 1-x/Al/sub x/As, where it is shown that all interfaces in this material will have both a critical angle and a Brewster angle due to differing effective masses across the interface.>

An analytic expression for the lower bound on the complexity of residue multiplication is developed. Significant reduction of the required stored logic in a content-addressable memory is noted. Errors in Figs. 5(a), 7, and 8 of the above paper1 are corrected.

Diffraction characteristics of general dielectric planar (slab) gratings and surface-relief (corrugated) gratings are reviewed. Applications to laser-beam deflection, guidance, modulation, coupling, filtering, wavefront reconstruction, and distributed feedback in the fields of acoustooptics, integrated optics, holography, and spectral analysis are discussed. An exact formulation of the grating diffraction problem without approximations (rigorous coupled-wave theory developed by the authors) is presented. The method of solution is in terms of state variables and this is presented in detail. Then, using a series of fundamental assumptions, this rigorous theory is shown to reduce to the various existing approximate theories in the appropriate limits. The effects of these fundamental assumptions in the approximate theories are quantified and discussed.

Truth table look-up processing using binary coded residue numbers is investigated for full-precision addition and multiplication for implementations using either electronic or optical technologies. The logically minimized numbers of input combinations needed for each operation are presented for moduli 2-23. The moduli sets that require the minimum number of reference patterns are determined for addition and multiplication of 4, 8, 12, and 16 bit words.