An analog silicon photomultiplier (SiPM) based receiver with wideband transimpedance amplifier (TIA) is proposed for direct ToF LiDAR applications. The analog SiPM comprises a$16\times 32$single photon avalanche diodes (SPADs) array with a 25% fill factor. A fully differential pixel readout circuit is proposed within the pixel cell to facilitate the monolithic integration with the subsequent TIA and reduce the output capacitance of the analog SiPM. The TIA with the multipath feedforward compensation technique is proposed to improve the stability and achieve a wider −3-dB bandwidth. The adder array is used in this design to output the intensity information for the walk error compensation and the target identification. The proposed receiver, which is fabricated in$0.18~\mu \text{m}$HV-CMOS technology, achieves a −3-dB bandwidth of 420 MHz. A maximum detection range of 65 m is obtained with 20 W laser peak power,$1.8^{\circ }\times 1.8^{\circ }$field of view, and 40 mm aperture. A ranging accuracy of ±0.4 cm and precision of 4.5 cm are attained under a condition of 5 klux ambient light based on 1000 measurement results.

This article describes a small footprint, low power gated voltage-controlled ring oscillator (VCRO)-based Time-To-Digital converter (TDC) for Flash Light Detection and Ranging (LiDAR) applications. A group of compact local phase interpolators (PIs) are used to improve the resolution, which is highly area-saving and compatible with in-pixel TDC structure. A non-reset operation mode is introduced to increase the linearity by taking advantage of the dynamic element matching (DEM) property. The proposed TDC has been fabricated in a 0.18-$\mu \text{m}$HV-CMOS technology in a 32$\times32$array, achieving a resolution of 50 ps. A Phase Lock Loop (PLL) is adopted to track the process, voltage, and temperature (PVT) variations and make the resolution tunable. A power-saving analog buffer is used to distribute the stable control voltage to all the in-pixel TDCs. Measurements show a good linearity performance and array uniformity (a deviation of only 0.89 ps), making it suitable for Flash LiDAR applications.

To increase the light detection and ranging (LiDAR) system spatial resolution, the multiple photodetectors are typically deployed in the receiver. An equivalent linear-array receiver with multiplexing operation scheme is presented for the direct time of flight (dToF) LiDAR applications. In particular, the analog front-end (AFE) circuit of the proposed receiver mainly consists of eight transimpedance preamplifiers (preTIAs), a dummy preTIA, a post amplifier (PA) with an 8-to-1 multiplexer, an analog output buffer and a timing discriminator. The proposed AFE circuit, which achieves a transimpedance gain of ~106 dB$\Omega $, a bandwidth of ~220 MHz, an equivalent input-referred noise current of ~5.1 pA/Hz0.5 and a channel switchover time of 6 ns, was fabricated in a 65 nm standard CMOS technology. The associated DC power consumption is 137 mW with a power supply of 2.5 V. The total area of the proposed AFE circuit, which includes the circuit core, bias circuits and I/O PADs, is approximately equal to$1.2\times 1.2$mm2.