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Thanh N. Phung

dblp:51/4518 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 56% High-performance computing · 44%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing
parallel i/o
0.011995
Parallel Processing of Spaceborne Imaging Radar Data · SC 1995
Parallel and multicore computing › parallel computing
parallel scientific computing
0.011995
Parallel Processing of Spaceborne Imaging Radar Data · SC 1995
Parallel and multicore computing › data distribution
data decomposition
0.011995
Parallel Processing of Spaceborne Imaging Radar Data · SC 1995

Methods — techniques the papers use, named apart from their topics

node-level optimization · 0.0data decomposition · 0.0
YearPublicationVenuePosition
1995 Parallel Processing of Spaceborne Imaging Radar Data
abstract
We discuss the results of a collaborative project on parallel processing of Synthetic Aperture Radar (SAR) data, carried out between the NASA/Jet Propulsion Laboratory (JPL), the California Institute of Technology (Caltech) and Intel Scalable Systems Division (SSD). Through this collaborative effort, we have successfully parallelized the most compute-intensive SAR correlator phase of the Spaceborne Shuttle Imaging Radar-C/X-Band SAR (SIR-C/X-SAR) code, for the Intel Paragon. We describe the data decomposition, the scalable high-performance I/O model, and the node-level optimizations which enable us to obtain efficient processing throughput. In particular, we point out an interesting double level of parallelization arising in the data decomposition which increases substantially our ability to support ''high volume'' SAR. Results are presented from this code running in parallel on the Intel Paragon. A representative set of SAR data, of size 800 Megabytes, which was collected by the SIR-C/X-SAR instrument aboard NASA's Space Shuttle in 15 seconds, is processed in 55 seconds on the Concurrent Supercomputing Consortium's Paragon XP/S 35+. This compares well with a time of 12 minutes for the current SIR-C/X-SAR processing system at JPL. For the first time, a commercial system can process SIR-C/X-SAR data at a rate which is approaching the rate at which the SIR-C/X-SAR instrument can collect the data. This work has successfully demonstrated the viability of the Intel Paragon supercomputer for processing ''high volume" Synthetic Aperture Radar data in near real-time.
Craig Miller, David G. Payne, Thanh N. Phung, Herb Siegel, Roy Williams
SC3