Chiplets are a promising architecture for high-performance AI computing, but their package-level interconnects create a tightly coupled multiphysics problem involving signal delivery, power delivery, and heat dissipation. This challenge is compounded by the need to co-optimize the interposer and substrate, which have divergent design rules and performance sensitivities. To address these challenges, we propose MIP-SPT, a framework for multi-level interconnect planning. We introduce a hierarchical variable sched- uling strategy that decouples interposer and substrate variables, significantly reducing the search space. MIP-SPT then employs a multi-phase Bayesian optimization scheme to fully explore the streamlined design space. Crucially, our framework quantitatively models the effects of multiphysics coupling during planning to achieve rapid design closure. Experimental results show that our work reduces manufacturing cost by 22.4% compared to the baseline single-phase Bayesian optimization under equivalent design con- straints. In addition, it outperforms two existing works, lowering interconnect cost by 23.1% and 18.1%, respectively.

Accurate setup/hold time characterization is crucial for modern chip timing closure, but its reliance on potentially millions of SPICE simulations across diverse process-voltage-temperature (PVT) corners creates a major bottleneck, often lasting weeks or months. Existing methods suffer from slow search convergence and inefficient exploration, especially in the multi-corner setting. We introduce SetupKit, a novel framework designed to break this bottleneck using statistical intelligence, circuit analysis and active learning (AL). SetupKit integrates three key innovations: BEIRA, a bias-enhanced interpolation search derived from statistical error modeling to accelerate convergence by overcoming stagnation issues, initial search interval estimation by circuit analysis and AL strategy using Gaussian Process. This AL component intelligently learns PVT-timing correlations, actively guiding the expensive simulations to the most informative corners, thus minimizing redundancy in multi-corner characterization. Evaluated on industrial 22nm standard cells across 16 PVT corners, SetupKit demonstrates a significant 2.4× overall CPU time reduction (from 720 to 290 days on a single core) compared to standard practices, drastically cutting characterization time. SetupKit offers a principled, learning-based approach to library characterization, addressing a critical EDA challenge and paving the way for more intelligent simulation management.

Efficient power allocation and interference management are critical challenges in dynamic wireless communication systems. To address these challenges, graph neural networks (GNNs) have attracted significant attention, while knowledge graph further enhance this capability by representing structured interactions among entities. This article proposes the Power-focused Knowledge Graph Convolutional Network (PKGCN), a novel framework utilizing knowledge graph driven learning to model and optimize power allocation strategies. By integrating wireless-specific features such as channel conditions and interference metrics, PKGCN effectively captures the complex interactions and dependencies among network nodes. This model employs a message aggregation layer to extract local and global interactions and a power prediction layer to optimize resource allocation. Comprehensive evaluations reveal that PKGCN de-livers higher average user rates, lower interference levels, and greater robustness.

Permissioned blockchains are being widely applied to solve the trust problem in enterprise collaboration. However, most of these systems suffer from low throughput and flexibility lacking issues. In this paper, we present a blockchain system SChain with scalable concurrent execution based on a flexible architecture. SChain separates the functionality of a complete "node" into three sub-functions and assigns them to different peers within every organization. Then each organization can scale each sub-function flexibly with no need for negotiation between organizations. Based on this architecture, SChain explores scalable concurrent execution from two levels. First, SChain takes the advantage of multiple peers to execute transactions collectively, while promising they make the same results as one peer does serially. Second, SChain enables concurrent transaction execution across blocks to utilize the resources of peers fully, breaking up the block-by-block process manner, based on a pipelined workflow. The extensive evaluation results demonstrate that SChain significantly outperforms the serial execution and other competing systems-level approaches.

With the development of Medical Internet of Things (MIoT) technology and the global COVID-19 pandemic, hospitals gain access to patients’ health data from remote wearable medical equipment. Federated learning (FL) addresses the difficulty of sharing data in remote medical systems. However, some key issues and challenges persist, such as heterogeneous health data stored in hospitals, which leads to high communication cost and low model accuracy. There are many approaches of federated distillation (FD) methods used to solve these problems, but FD is very vulnerable to poisoning attacks and requires a centralised server for aggregation, which is prone to single-node failure. To tackle this issue, we combine FD and blockchain to solve data sharing in remote medical system called FedRMD. FedRMD use reputation incentive to defend against poisoning attacks and store reputation values and soft labels of FD in Hyperledger Fabric. Experimenting on COVID-19 radiography and COVID-Chestxray datasets shows our method can reduce communication cost, and the performance is higher than FedAvg, FedDF, and FedGen. In addition, the reputation incentive can reduce the impact of poisoning attacks.

User interests are significant components in recommendation systems. Modeling user interests based on users' historical behaviors is a challenging problem, and many recommendation models have been proposed for user interests modeling, such as long-term and short-term interests modeling. In the real world, users' interests always change over time, however, existing models rarely consider users' interest changes. The purpose of this research is to apply graph neural networks to capture users' interest changes. This research first conducts data analysis on two public datasets, and results show that there are considerable amounts of users with a trend of interest changes. Based on this analysis, we construct user-category dynamic differential graphs, and we design a novel neural network based on dynamic differential graphs to learn users' interest changes representations from dynamic differential graphs. The learned representations are integrated with long-term and short-term interest representations to get users' final representations and make recommendations by getting scores with items. Different types of experiments are conducted to evaluate the performance of our proposed model, and experiment results show that the proposed model outperforms other baseline models.

We demonstrate SChain, a consortium blockchain that scales transaction processing to support large-scale enterprise applications. The unique advantage of SChain stems from the exploitation of both intra- and inter-block concurrency. The intra-block concurrency not only takes advantage of the multi-core processor on a single peer but also leverages the capacity of multiple peers. The interblock concurrency enables simultaneous processing across multiple blocks to increase the utilization of various peers. In our demonstration, we use real-time dashboards containing visualization based on the output of SChain to give the attendees interactive explorations of how SChain achieves intra- and inter-block concurrency.

In this work, we present a CODEC design for the forbidden transition free crosstalk avoidance code. Our mapping and coding scheme is based on the Fibonacci numeral system and the mathematical analysis shows that all numbers can be represented by FTF vectors in the Fibonacci numeral system (FNS). The proposed CODEC design is highly efficient, modular and can be easily combined with a bus partitioning technique. We also investigate the implementation issues and our experimental results show that the proposed CODEC complexity is orders of magnitude better compared to the brute force implementation. Compared to the best existing approaches, we achieve a 17% improvement in logic complexity. A high speed design can be achieved through pipelining.