A system of CAD programs, called SPIDER, for ensuring adequate current-carrying capacity in VLSI circuits has been developed. The approach is hierarchical, and it automates and simplifies many of the tasks previously performed by the circuit designer. The system converts transient current waveforms into dc electromigration equivalent values, and includes an algorithm for determining the line width adjustments necessary for meeting specified median-time-to-failure (MTF) requirements. SPIDER also computes voltage drops with respect to a reference node and calls upon an optimization algorithm for correcting violations of a voltage drop specification.