A method of modeling the distributed source and drain resistance effects in MOS transistors is discussed. Simulations performed using this technique are validated by comparisons with purpose-built structures. The method is then used to examine a problem which arises with the use of a high-temperature interconnect in three-dimensional silicon-on-insulator technologies. The results show how the resistivity of the interconnect affects the performance of the substrate devices of this technology, and the benefits achievable through further development of the existing interconnect technologies are outlined. Finally, the procedure is used to examine the effect of reduced contact size on standard MOS devices, and results wh1ich give general guidelines to the extent of the effect are presented.>

The method of extracting MOSFET model parameters using optimization offers significant advantages over classical methods of extracting model parameters sequentially. Previous work in this field has concentrated on speed of convergence rather than general applicability. Gradient following methods have been applied to this problem but difficulties arise because of parameter redundancy, singularities in the objective function, and the necessity of providing very good initial estimates of the model parameters. These factors can seriously hinder the application of the technique. This paper describes the application of the simplex direct search optimization method to this problem. This algorithm, in wide use for general optimization problems, needs no derivative calculation and has proved highly stable for MOS model parameter extraction. Its basis is described and an example of its use given.