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Ted Williams

dblp:52/5453 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 67% Processor architecture and microarchitecture · 33%
Theoretical computer science
1 paper
Algorithms and data structures · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › digital circuit design
arithmetic circuit design
0.011995
Choices of Operand Truncation in the SRT Division Algorithm · IEEE Trans. Computers 1995
Integrated circuit design
digital circuit design
0.011995
Choices of Operand Truncation in the SRT Division Algorithm · IEEE Trans. Computers 1995
Processor architecture and microarchitecture › computer arithmetic
SRT division
0.011995
Choices of Operand Truncation in the SRT Division Algorithm · IEEE Trans. Computers 1995
Algorithms and data structures › symbolic computation
division algorithms
0.011995
Choices of Operand Truncation in the SRT Division Algorithm · IEEE Trans. Computers 1995
Algorithms and data structures
numerical algorithms
0.011995
Choices of Operand Truncation in the SRT Division Algorithm · IEEE Trans. Computers 1995
YearPublicationVenuePosition
1995 Choices of Operand Truncation in the SRT Division Algorithm
abstract
The paper presents an analysis of the number of partial remainder digits and divisor bits that must be examined in the SRT division algorithm. The number of examined digits is found to be the same for both signed digit and 2s complement partial remainder representations, and appears to increase as 3log/sub 2/r approximately, where r is the radix of the divider. In some cases, it proves advantageous to examine a fractional number of remainder digits by inspecting more positive than negative bits.>
Neil Burgess, Ted Williams
IEEE Trans. Computers2