Embedded systems increasingly include an FPGA for performance or power efficiency. Fortunately, FPGA makers provide efficient tools to develop and assemble multiple Intellectual Properties (IPs) as devices on FPGAs. Unfortunately, the integration challenge does not stop there, hardware devices are only usable if they have available software device drivers executing on the processor subsystem. To better approach this end-to-end integration challenge, across both hardware and software, we argue that both sides need to evolve. We propose to take a step towards message-based interfaces for hardware devices integrated on an FPGA. Our goal is to deliver to the FPGA market the plug-and-play value of the USB stack with essentially no performance overhead, negligible power increase, and a reasonable surface cost. We have implemented our proposal on the Xilinx Zynq SoC, combining ARM cores and an FPGA, demonstrating the feasibility of the approach.

Dynamic Binary Translation is one of the most efficient strategies for the simulation of System-on-Chips, with recent studies showing that a large part of the simulation time is spent in realizing memory accesses. Indeed, the simulation of each load and store instructions requires a software emulation of the hardware Memory Management Unit (MMU). In this work, we propose to realize memory accesses in hardware, taking advantage of the hardware-assisted virtualization capabilities that are now available in modern processors. To do so, we have to setup and maintain shadow page tables, like any regular hypervisor would do, running the entire simulator on a virtual CPU. Now, each load and store instructions can be translated to just a couple of load and store instruction, executing at regular speed, therefore avoiding entirely the overhead of the software emulation of hardware MMU. The goal of this paper is to explain how it can be done. To demonstrate our idea, we have implemented our approach in the QEMU retargetable DBT engine, speeding up the simulation by as much as 40%.

Summary This paper focuses on the dynamic reconfiguration of component‐based software systems. From a structural point of view, such systems are made of components linked together through their provided and required services, the code of components being defined by modules (e.g., jar files). Today, the ability to reconfigure component‐based systems at runtime faces limitations. Some component frameworks allow to dynamically reconfigure components – starting or stopping them, or changing how they are wired together for instance – but forbid any dynamic evolution of the modules defining their code. Other frameworks allow to dynamically update modules but at the cost of loosing control on component wires, preventing software architects or tools alike to decide how components are wired together. In this paper, we propose a component framework that addresses these limitations through a unified approach for the management of components and modules. Our approach uniquely enables to reconfigure both components and modules at runtime, without restrictions. We prototyped the proposed framework in Java and exercised various dynamic reconfigurations of component‐based systems. Furthermore, we formalized this framework and proved the correctness of its reconfiguration protocol with the Coq proof assistant. Copyright © 2017 John Wiley & Sons, Ltd.

Grid or cloud environments leverage the need for self-repair solutions that resist and repair their own failures, something not yet ensured by existing solutions. In this paper, we describe the JADE Autonomic Repair System for legacy applications deployed in a grid or cloud environment. JADE is based on three main design principles. First, legacy applications are wrapped with Java objects, obtaining a uniform set of management operations over the heterogeneous legacy management capabilities. Second, to gain full autonomy, we adopt a replicated design combined with a recursive approach that makes JADE appear to JADE as any distributed application it manages and repairs. Finally, to scale, we rely on tiling the distributed environment and structuring our repair system per tile. To our knowledge, our repair system is the only one that is designed to scale and is fully autonomic, repairing not only the failures of the managed system but also its own. Our repair system has been tested in various realistic scenarios. Copyright © 2013 John Wiley & Sons, Ltd.

In this paper, we propose a reconfiguration protocol that can handle any number of failures during a reconfiguration, always producing an architecturally-consistent assembly of components that can be safely introspected and further reconfigured. Our protocol is based on the concept of Incrementally Consistent Sequences (ICS), ensuring that any reconfiguration incrementally respects the reconfiguration contract given to component developers: reconfiguration grammar and architectural invariants. We also propose two recovery policies, one rolls back the failed reconfiguration and the other rolls it forward, both going as far as possible, failure permitting. We specified and proved the reconfiguration contract, the protocol, and recovery policies in Coq.

Autonomic computing enables computing infrastructures to perform administration tasks with minimal human intervention. This wrap-up paper describes the experience we gained with the design and use of Jade ---an architecture-based autonomic system. The contributions of this article are, (1) to explain how Jade provides autonomic management of a distributed system through an architecture-based approach, (2) to explain how we extended autonomic management from traditional self behaviors such as repairing or protecting a managed system to self-self behaviors where Jade also fully manages itself as it manages any other distributed system, (3) to report on our experience reaching self-self behaviors for two crucial autonomic properties, repair and protection.

Abstract Modern distributed systems are diverse and dynamic, and consequently difficult to manage using traditional approaches, which rely on an extensive initial knowledge of the system. On the performance front, these systems often offer multiple opportunities for dynamically degrading or improving service level based on workload intensity, to avoid overload and underload. In this context, we propose a novel approach for building distributed systems capable of autonomously deciding when and how to adapt service level. Our approach limits the knowledge that must be provided manually to a component‐based representation of the system. From this representation, we build and maintain a performance profile, which allows us to (1) identify the most promising adaptations based on workload type and (2) dynamically characterize the intrinsic efficiency of each adaptation based on past attempts. We have successfully implemented and evaluated a prototype of our approach in the context of multi‐tiered application servers. Copyright © 2010 John Wiley & Sons, Ltd.

We describe an efficient server-based algorithm for garbage collecting persistent object stores in a client-server environmnet. The algorithm is incremental and runs concurrently with client transactions. Unlike previous algorithms, it does not hold any transactional locks on data and does non require callbacks to clients. It is fault-tolerant, but performs very little logging. The algorithm has been designed to be integrated into existing systems, and therefore it works with standard implementation techniques such as Two-Phase Locking and Write-Ahead-Logging. In addition, it supports client-server performance optimizations such as client caching and flexible management of client buffers. We describe an implementation of the algorithm in the EXODUS storage manager and present the results of a performance study of the implementation.

Nested transactions facilitate the control of complex persistent applications by enabling both fine-tuning of the scope of rollback and safe intra-transaction parallelism. We are concerned with supporting concurrent nested transactions on client workstations of an OODBMS. Use of the traditional design and implementation of a lock manager results in a high CPU overhead: in-cache traversals of the 007 benchmark perform, at best, 4.5 times slower than the same traversal achieved in virtual memory by a nonpersistent programming language. We propose a new design and implementation of a lock manager which cuts that factor down to 1.8. This lock manager supports nested transactions with both sibling and parent/child parallelisms, and provides object locking at a cost comparable to page locking. Object locking is therefore a better alternative due to its higher functionality.>

Optimizing method dispatch is a central issue in object-oriented language implementation. The dispatch table scheme, used for example by C++, is the only implementation of method dispatch that offers constant time performance. This property is the main asset of dispatch tables and a major requirement for some languages. However, the major drawback of dispatch tables is the space they require. Reducing the size of dispatch tables has been studied in the case of mono-methods with techniques such as coloring. In the case of multi-methods, dispatch tables are practically unusable as they grow as a power of the number of arguments. In this paper, we propose an algorithm to compress the dispatch tables of multi-methods by analyzing their signatures.