Sung-Min Hong

dblp:53/5472 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 2018
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
memory access
0.112008
A practical approach of memory access parallelization to exploit multiple off-chip DDR memories · DAC 2008
Memory systems › memory access
parallel memory access
0.112008
A practical approach of memory access parallelization to exploit multiple off-chip DDR memories · DAC 2008

Methods — techniques the papers use, named apart from their topics

transaction id renaming · 0.1distributed soft arbitration · 0.1
YearPublicationVenuePosition
2018 Calculation of Atomic Energy Levels by Using a Fully-Coupled Solver for the Kohn-Sham Equation and the Poisson Equation
abstract
In this work, a density-functional theory calculation of atomic energy levels is performed. Two equations in the density-functional theory, the Kohn-Sham equation and the Poisson equation, are fully coupled. The static dielectric function is accurately evaluated. By considering the exact dielectric function in the self-consistent field loop, the convergence behavior of the Newton-Raphson method is greatly improved. It is expected that this approach can be extended to the calculation of the band structure of crystalline materials.
Sung-Min Hong
TENCON1
2011 Pre-filtering with locally adaptive filter set for reference frame in video compression
abstract
To reduce temporal redundancy, conventional video coding standards, such as H.264/AVC, use block based motion estimation (ME) and compensation algorithm. However, the coding performance of H.264/AVC significantly drops when characteristics of video contents are changed due to the motion. In this paper, we proposed a pre-filtering algorithm with locally adaptive filter set for the reference frame to minimize the prediction error in the ME process. With image statistics, we adaptively construct a pre-filter set and apply the pre-filter set to the reference frame locally. The proposed algorithm is more efficient in sequences that have high resolution or fast motion. By manipulating the reference frame similar to the current frame, the coding performance is significantly improved. Compared with H.264/AVC, the proposed algorithm achieves bit-rate reduction up to 15.28%.
Jinik Jang, Hyuk Lee, Taeyoung Jung, Sung-Min Hong, Jechang Jeong
ICME4
2008 A practical approach of memory access parallelization to exploit multiple off-chip DDR memories
abstract
3D stacked memory enables more off-chip DDR memories. Redesigning existing IPs to exploit the increased memory parallelism will be prohibitively costly. In our work, we propose a practical approach to exploit the increased bandwidth and reduced latency of multiple off-chip DDR memories while reusing existing IPs without modification. The proposed approach is based on two new concepts: transaction id renaming and distributed soft arbitration. We present two on-chip network components, request parallelizer and read data serializer, to realize the concepts. Experiments with synthetic test cases and an industrial strength DTV SoC design show that the proposed approach gives significant improvements in total execution cycle (21.6%) and average memory access latency (31.6%) in the DTV case with a small area overhead (30.1% in the on-chip network, and less than 1.4% in the entire chip).
Woo-Cheol Kwon, Sungjoo Yoo, Sung-Min Hong, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo
DAC3
2008 An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication
abstract
3D stacked memory is being adopted as a promising solution to offer high bandwidth and low latency in memory access. Compared with the on-chip network design with conventional off chip memory, it gives a new problem of minimizing communication conflicts since multiple concurrent high bandwidth data transfers will flow through the on-chip network. In order to tackle this problem, we propose applying an open-loop flow control scheme based on the accurate global information (destination and status) of on-chip communication. The proposed open-loop flow control scheme exploits the information and selectively buffers and arbitrates data transfers to remove conflicts at destinations in a preventive manner. As an implementation of the presented scheme, we present on-chip buffers called Buf3D's that share the global information with each other to perform the selective buffering and arbitration of data transfers. Experiments with synthetic test cases and an industrial strength DTV design show that the proposed method improves aggregate memory bandwidth significantly (average 19.0 %~25.8 % in the synthetic cases and up to 18.4 % in the DTV case) with a small area overhead (15.2 % in the DTV case) of on-chip network.
Woo-Cheol Kwon, Sung-Min Hong, Sungjoo Yoo, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo
DATE2