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Pierre Lavoie

dblp:53/927 · DBLP profile ↗
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14ranked-venue papers
4as first author
0since 2021 · last 2006
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 5 · 2 first-authorSystems, architecture and hardware · 3Computer networks · 3 · 2 first-authorGraphics, computer vision, multimedia, augmented reality and games · 3

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Integrated circuit design · 42% Electronic design automation · 33% Processor architecture and microarchitecture · 25%
Theoretical computer science
2 papers
Coding theory · 100%
Databases, data mining, and information retrieval
1 paper
Data mining · 100%
Computer networks
1 paper
Physical-layer communications · 100%

Topics — the 15 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design
0.122006
A Metric for Automatic Word-Length Determination of Hardware Datapaths · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
New architectures for fast convolutional encoders and threshold decoders · IEEE J. Sel. Areas Commun. 1988
Processor architecture and microarchitecture › computer arithmetic
fixed-point arithmetic
0.112006
A Metric for Automatic Word-Length Determination of Hardware Datapaths · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Electronic design automation
high-level synthesis
0.112006
A Metric for Automatic Word-Length Determination of Hardware Datapaths · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Data mining
clustering
0.012003
A Pattern Reordering Approach Based on Ambiguity Detection for Online Category Learning · IEEE Trans. Pattern Anal. Mach. Intell. 2003
Integrated circuit design › digital circuit design › combinational logic
decoder architecture
0.021994
A systolic architecture for fast stack sequential decoders · IEEE Trans. Commun. 1994
New VLSI architectures for fast soft-decision threshold decoders · IEEE Trans. Commun. 1991
Integrated circuit design › digital circuit design
VLSI architecture
0.021994
A systolic architecture for fast stack sequential decoders · IEEE Trans. Commun. 1994
New VLSI architectures for fast soft-decision threshold decoders · IEEE Trans. Commun. 1991
Electronic design automation
design space exploration
0.012006
A Metric for Automatic Word-Length Determination of Hardware Datapaths · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Coding theory › error-correcting codes › decoding
sequential decoding
0.011994
A systolic architecture for fast stack sequential decoders · IEEE Trans. Commun. 1994
Coding theory › error-correcting codes › decoding › sequential decoding
stack decoding
0.011994
A systolic architecture for fast stack sequential decoders · IEEE Trans. Commun. 1994
Coding theory › error-correcting codes
convolutional codes
0.011991
New VLSI architectures for fast soft-decision threshold decoders · IEEE Trans. Commun. 1991
Coding theory › error-correcting codes › decoding › decoding algorithms
threshold decoding
0.011991
New VLSI architectures for fast soft-decision threshold decoders · IEEE Trans. Commun. 1991
Physical-layer communications
channel coding
0.011988
New architectures for fast convolutional encoders and threshold decoders · IEEE J. Sel. Areas Commun. 1988
Physical-layer communications › channel coding › error control coding
convolutional codes
0.011988
New architectures for fast convolutional encoders and threshold decoders · IEEE J. Sel. Areas Commun. 1988
Coding theory › error-correcting codes › decoding
soft-decision decoding
0.011991
New VLSI architectures for fast soft-decision threshold decoders · IEEE Trans. Commun. 1991
Integrated circuit design › semiconductor device fabrication
CMOS technology
0.011988
New architectures for fast convolutional encoders and threshold decoders · IEEE J. Sel. Areas Commun. 1988

Methods — techniques the papers use, named apart from their topics

fixed-point simulation · 0.1error modeling · 0.1softmax model · 0.0gaussian model · 0.0competitive learning neural network · 0.0pipelining · 0.0systolic priority queue · 0.0parallelism · 0.0parallel architecture · 0.0
YearPublicationVenuePosition
2006 A Metric for Automatic Word-Length Determination of Hardware Datapaths
abstract
A metric for the automatic determination of word lengths required for implementing DSP algorithms is proposed. The metric is capable of handling several error models computed between the fixed-point and the floating-point simulation results to model the impact of finite word lengths on the overall accuracy. It grades all the word-length combinations and guides a procedure towards the optimal solution. This metric was implemented in an automatic word-length determination tool to guide its search for better hardware implementations. It enables the creation of a framework for architecture and platform exploration.
Marc-André Cantin, Yvon Savaria, D. Prodanos, Pierre Lavoie
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4
2005 Hidden Markov models for radar pulse train analysis in electronic warfare
abstract
We present a new approach to radar pulse train analysis in electronic warfare. We consider an alternative to the classical time-of-arrival (TOA) histogram technique commonly used for extraction of complex pulse patterns. We derive a hidden Markov model for the radar word templates, and develop a modified version of the Viterbi algorithm to extract radar words from noisy and corrupted pulse sequences. We argue the advantages of this approach compared to the standard TOA histogram technique, and illustrate operation of the algorithm with computer simulation results.
Nikita Visnevski, Simon Haykin 0001, Vikram Krishnamurthy, Fred A. Dilkes, Pierre Lavoie
ICASSP (5)5
2003 A Pattern Reordering Approach Based on Ambiguity Detection for Online Category Learning
abstract
Pattern reordering is proposed as an alternative to sequential and batch processing for online category learning. Upon detecting that the categorization of a new input pattern is ambiguous, the input is postponed for a predefined time, after which it is reexamined and categorized for good. This approach is shown to improve the categorization performance over purely sequential processing, while yielding a shorter input response time, or latency, than batch processing. In order to examine the response time of processing schemes, the latency of a typical implementation is derived and compared to lower bounds. Gaussian and softmax models are derived from reject option theory and are considered for detecting ambiguity and triggering pattern postponement. The average latency and Rand Adjusted clustering score of reordered, sequential, and batch processing are compared through computer simulation using two unsupervised competitive learning neural networks and a radar pulse data set.
Eric Granger, Yvon Savaria, Pierre Lavoie
IEEE Trans. Pattern Anal. Mach. Intell.3
2001 A What-and-Where fusion neural network for recognition and tracking of multiple radar emitters
Eric Granger, Mark A. Rubin, Stephen Grossberg, Pierre Lavoie
Neural Networks4
2000 Analysis of SNR threshold for differential Doppler frequency measurement in digital receivers
abstract
There is a signal-to-noise ratio (SNR) below which the frequency of a coherent radar pulse train can be estimated no more accurately than the incoherent combination of the frequency estimates from the individual pulses. This SNR threshold applies to all frequency estimators, and defines a fundamental limit for passive location of radar emitters using differential Doppler. In this paper, an approximation to the estimation variance of any maximum likelihood (ML) type estimator is derived. The approximation is shown to be a very good predictor of the mean square error performance of ML estimators and the SNR at which the threshold occurs. A rigorous Barankin bound on any unbiased estimator of frequency is derived and compared to the above approximate estimation variance.
Stephen D. Howard, Pierre Lavoie
ICASSP2
2000 Classification of Incomplete Data Using the Fuzzy ARTMAP Neural Network
abstract
The fuzzy ARTMAP neural network is used to classify data that is incomplete in one or more ways. These include a limited number of training cases, missing components, missing class labels, and missing classes. Modifications for dealing with such incomplete data are introduced, and performance is assessed on an emitter identification task using a database of radar pulses.
Eric Granger, Mark A. Rubin, Stephen Grossberg, Pierre Lavoie
IJCNN (6)4
2000 Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm
abstract
A reformulated Adaptive Resonance Theory (ART) neural network algorithm has recently been implemented in digital hardware. Naturally, the fixed point, fixed word length data format used causes some output differences with respect to floating point computer simulation. These differences are observed when using realistic input data. The effects of input quantization and the accumulation of round off errors in the arithmetic operations making up the algorithm are analyzed. Even a small quantization or round off error can trigger a change in the clustering produced. This does not mean that the clustering is not valid. Indeed, the validity of the clustering can be comparable to that obtained by floating point computer simulation, provided the word length is sufficient. This is verified on realistic input data consisting of radar pulses received from a number of emitters.
Marc-André Cantin, Yves Blaquière, Yvon Savaria, Pierre Lavoie, Eric Granger
ISCAS4
1999 Choosing a choice function: granting new capabilities to ART
abstract
New capabilities are granted to the adaptive resonance theory (ART) model by modifying its choice function, and hence the order of search through categories. These capabilities are achieved by: 1) allowing the choice function to depend on as many constant parameters under external control as desired, including possibly vigilance, 2) using multiple choice functions to separate categories into various subsets, and 3) dynamically varying the parameters between input presentations, without resetting the network weights. This is possible without interfering with the orienting subsystem, the vigilance test, nor the learning rule of the original model. It is shown that the main requirement for a choice function is that learning must increase its value for the selected category. If this requirement is met, and the learning rule is compatible with self-stabilization, then the value of the weight vector of each committed category is unique, and self-stabilization is guaranteed for an arbitrary sequence of analog inputs and parameters.
Pierre Lavoie
IJCNN1
1999 Generalization, discrimination, and multiple categorization using adaptive resonance theory
abstract
The internal competition between categories in the adaptive resonance theory (ART) neural model can be biased by replacing the original choice function by one that contains an attentional tuning parameter under external control. For the same input but different values of the attentional tuning parameter, the network can learn and recall different categories with different degrees of generality, thus permitting the coexistence of both general and specific categorizations of the same set of data. Any number of these categorizations can be learned within one and the same network by virtue of generalization and discrimination properties. A simple model in which the attentional tuning parameter and the vigilance parameter of ART are linked together is described. The self-stabilization property is shown to be preserved for an arbitrary sequence of analog inputs, and for arbitrary orderings of arbitrarily chosen vigilance levels.
Pierre Lavoie, Jean-François Crespo, Yvon Savaria
IEEE Trans. Neural Networks1
1998 A comparison of self-organizing neural networks for fast clustering of radar pulses
Eric Granger, Yvon Savaria, Pierre Lavoie, Marc-André Cantin
Signal Process.3
1994 Fast Convergence with Low Precision Weights in ART1 Networks
abstract
A new learning law, the Direct Coding Rule, is proposed for bottom-up long term memory learning in Adaptive Resonance Theory (ART) networks. This law requires less computational precision than the traditional Weber Law Rule and modifies the search dynamics of the network to accelerate convergence. Following a brief mathematical analysis of the new learning law, an ART1 network based on this law is applied to a passive radar detection problem. The simulation results allow comparison of the new law to the Weber Law Rule, with and without weight quantization, from the speed and cost viewpoints.>
Jean-François Crespo, Pierre Lavoie, Yvon Savaria
ISCAS2
1994 A systolic architecture for fast stack sequential decoders
abstract
The troublesome operation of reordering the stack in stack sequential decoders is alleviated by storing the nodes in a systolic priority queue that delivers the true top node in a short and constant amount of time. A new systolic priority queue is described that allows each decoding step, including retrieval, reordering and storage of the nodes, to take place in a single clock period. A complete decoder architecture designed around this queue is compared to a conventional stack-bucket architecture from both speed and cost points of view. The proposed decoder architecture appears to be faster, affordable, and compatible with convolutional codes having long memory and high coding rate.>
Pierre Lavoie, David Haccoun, Yvon Savaria
IEEE Trans. Commun.1
1991 New VLSI architectures for fast soft-decision threshold decoders
abstract
New VLSI architectures for fast convolutional threshold decoders that process soft-quantized channel symbols are presented. The new architectures feature pipelining and parallelism and make it possible to fabricate decoders for data rates up to hundreds of Mbits per second. With these architectures, the data rate is shown to be independent of the memory of the code, implying that fast AAPP (approximate a posteriori probability) decoders can be built for long powerful codes. Furthermore, the architectures are convenient to use with low and high coding rates. Using a typical example it is shown that a soft-decision threshold decoder can provide a substantial coding gain while being less costly to implement than the hard-decision threshold decoder.>
Pierre Lavoie, David Haccoun, Yvon Savaria
IEEE Trans. Commun.1
1988 New architectures for fast convolutional encoders and threshold decoders
abstract
Several new architectures for high-speed convolution encoders and threshold decoders are developed. In particular, it is shown that new architectures featuring both parallelism and pipelining are promising from a speed point of view. These architectures are practical for a wide range of coding rates and constant lengths. Two integrated circuits featuring these architectures have been designed and fabricated in a CMOS 3- mu m technology. The two circuits have been tested and can be used to build convolutional encoders and definite threshold decoders operating at data rates above 100 Mb/s. It is shown that with these architectures, encoders and threshold decoders could easily be designed to operate at data rates above 1 Gb/s.>
David Haccoun, Pierre Lavoie, Yvon Savaria
IEEE J. Sel. Areas Commun.2