When user's tasks in a distributed heterogeneous computing environment are allocated resources, and the total demand placed on system resources by the tasks, for a given interval of time, exceeds the resources available, some tasks will receive degraded service, receive no service at all, or may be dropped from the system. One part of a measure to quantify the success of a resource management system (RMS) in such an environment is the collective value of the tasks completed during an interval of time, as perceived by the user, the application, or the policy maker. For the case where a task may be a data communication request, the collective value of data communication requests that are satisfied during an interval of time is measured. The Flexible Integrated System Capability (FISC) measure defined here is one way of obtaining a multi-dimensional measure for quantifying this collective value. While the FISC measure itself is not sufficient for scheduling purposes, it can be a critical part of a scheduler or a scheduling heuristic. The primary contribution of this work is providing a way to measure the collective value accrued by an RMS using a broad range of attributes and to construct a flexible framework that can be extended for particular problem domains.

The Management System for Heterogeneous Networks (MSHN) is a system for managing a set of distributed resources. Integral to MSHN is the maintenance of status information concerning the resources available on those systems. The paper focuses on monitoring the end-to-end performance of message passing. The method used to gather this information is subject to three constraints: (1) the implementation must not require any changes to the operating system; (2) modifications to the application code must be minimized; and (3) the overhead imposed by the information gathering mechanism should not be excessive. We examined eight tools and application components, both commercial and research, that attempt to measure end-to-end message passing performance (W. Hayes-Roth and L. Erman, 1994; J. Kresho, 1997; C. Lee et al., 1998; N. Spring, 1997; R. Wolski et al., 1997).

Functional parallelism can be supported on SIMD machines by interpretation. Under such a scheme, the programs and data of each task are loaded on the processing elements (PEs) and the Control Unit of the machine executes a central control algorithm that causes the concurrent interpretation of the tasks on the PEs. The central control algorithm is, in many respects, analogous to the control store program on microprogrammed machines. Accordingly, the organization of the control algorithm greatly influences the performance of the synthesized MIMD environment. Most central control algorithms are constructed to interpret the execution phase of all instructions during every cycle (iteration). However, it is possible to delay the interpretation of infrequent and costly instructions to improve the overall performance. Interpreters that attempt improved performance by delaying the issue of infrequent instructions are referred to as variable issue control algorithms. This paper examines the construction of optimized variable issue control algorithms. In particular, a mathematical model for the interpretation process is built and two objective functions (instruction throughput and PE utilization) are defined. The problem of deriving variable issue control algorithms for these objective functions has been shown elsewhere to be NP-complete. Therefore, this paper investigates three heuristic algorithms for constructing near optimal variable issue control algorithms. The performance of the algorithms is studied on four different instruction sets and the trends of the schedulers with respect to the instruction sets and the objective functions are analyzed.

We show how to automatically map an object, given its sequential implemenfation, to a concurrent object with no points of interference. Automation is needed because without if programmers must determine where mutual exclusion is needed, where synchronization is needed, and how to ensure liveness, fairness, and absence of deadlock.

A programming paradigm for massively parallel SIMD computers is described. The paradigm requires that each program be compiled into a special instruction set. Initially, the MINTABS software architecture's instruction set is used. A process is assigned to a processing element (PE) by storing its instructions and data at that PE. The control unit broadcasts a fixed control algorithm and the PEs use it to interpret their own program. Initial experiments have demonstrated an increase in throughput by a factor of more than 700 on an 8192-processor machine. The throughput also increases linearly with the number of processors.>