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Willie Hsu

dblp:54/234 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%
Theoretical computer science
1 paper
Algorithms and data structures · 100%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design
0.011992
A 2.5 approximation algorithm for the multi-via assignment problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992
Electronic design automation › physical design
routing
0.011992
A 2.5 approximation algorithm for the multi-via assignment problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992
Electronic design automation › physical design › routing
via assignment
0.011992
A 2.5 approximation algorithm for the multi-via assignment problem · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992

Methods — techniques the papers use, named apart from their topics

approximation algorithm · 0.0
YearPublicationVenuePosition
1992 A 2.5 approximation algorithm for the multi-via assignment problem
abstract
The via assignment problem, whose objective is to minimize the number of via columns used, is known to be NP-hard even when each net includes at most three vias. The authors develop efficient approximation algorithms for solving this problem. An algorithm for the case in which the size of each net is bounded by three is presented, and is then extended to the case in which the nets have arbitrary sizes.>
Thang Nguyen Bui, Willie Hsu, SingLing Lee
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2