Demo Data from EDBT 2026 / reviewers in the wild / expert
Toshiaki Mori
dblp:54/3690
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 1996
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2Software engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 50% Storage systems · 50% |
Topics — the 2 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems › storage architecture
adaptive storage |
0.0 | 1 | 1991 | Adaptive Storage Management for Very Large Virtual/Real Storage Systems · ISCA 1991 |
Memory systems
virtual memory management |
0.0 | 1 | 1991 | Adaptive Storage Management for Very Large Virtual/Real Storage Systems · ISCA 1991 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1996 | Substrate noise influence on circuit performance in variable threshold-voltage schemeabstractThis paper investigates substrate noise influence on circuit performance in a variable threshold-voltage scheme (VT scheme) where threshold voltage is dynamically varied by substrate-bias control to reduce active power dissipation. It is experimentally examined that substrate-bias can be controlled stably with very few substrate-contacts. Measured tracking jitter of a delay-locked loop implemented by interconnections in an 8 mm-square gate array does not degrade even when substrate-contacts are removed except for one at every strip of p-sub and n-well: A 2 mm-square discrete cosine transform core processor with no substrate-contact except in its periphery operates at supply voltages from 1.3 V to above 3 V even though it employs small-swing differential dynamic pass-transistor logic. No performance degradation nor latchup is observed in these chips even when 100 k/spl Omega/ resistance is added to the substrate. These experimental results demonstrate noise immunity of the VT scheme, and indicate the possibility that the VT scheme can be applied to existing macro design easily. Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Toshiaki Mori, Kenji Matsuo, Masakazu Kakumu, Takayasu Sakurai |
ISLPED | 4 |
| 1991 | Adaptive Storage Management for Very Large Virtual/Real Storage SystemsabstractArticle Adaptive storage management for very large virtual/real storage systems Share on Authors: Toyohiko Kagimasa Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185, Japan Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185, JapanView Profile , Kikuo Takahashi Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185, Japan Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185, JapanView Profile , Toshiaki Mori Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185, Japan Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185, JapanView Profile , Seiichi Yoshizumi System Development Laboratory, Hitachi Ltd., 1099 Ohzenji, Asoh-ku, Kawasaki, Kanagawa 215, Japan System Development Laboratory, Hitachi Ltd., 1099 Ohzenji, Asoh-ku, Kawasaki, Kanagawa 215, JapanView Profile Authors Info & Claims ISCA '91: Proceedings of the 18th annual international symposium on Computer architectureApril 1991 Pages 372–379https://doi.org/10.1145/115952.115989Published:01 April 1991 6citation425DownloadsMetricsTotal Citations6Total Downloads425Last 12 Months2Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access Toyohiko Kagimasa, Kikuo Takahashi, Toshiaki Mori, Seiichi Yoshizumi |
ISCA | 3 |