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Jean P. Chinal

dblp:54/4394 · DBLP profile ↗
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4ranked-venue papers
4as first author
0since 2021 · last 1977
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorTheory of computation · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 75% Integrated circuit design · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
computer arithmetic
0.021977
Boolean Features of Sign-Flipping and Signed-Carry Logic in Base -2 · IEEE Trans. Computers 1977
Some Comments on Postcorrections for Nonrestoring Division · IEEE Trans. Computers 1972
Integrated circuit design › digital circuit design › arithmetic circuit design
binary adder
0.011977
Boolean Features of Sign-Flipping and Signed-Carry Logic in Base -2 · IEEE Trans. Computers 1977
Processor architecture and microarchitecture › computer arithmetic
negative base arithmetic
0.011977
Boolean Features of Sign-Flipping and Signed-Carry Logic in Base -2 · IEEE Trans. Computers 1977
Processor architecture and microarchitecture › division algorithm
nonrestoring division
0.011972
Some Comments on Postcorrections for Nonrestoring Division · IEEE Trans. Computers 1972

Methods — techniques the papers use, named apart from their topics

boolean algebra · 0.0
YearPublicationVenuePosition
1977 Boolean Features of Sign-Flipping and Signed-Carry Logic in Base -2
abstract
A direct self-contained proof of sign-flipping logic for base -2 binary numbers is derived and the same approach is extended to the derivation of a particular adder logic. Sign-flipping equations are contrasted with the logic for assimilated complement in classical binary. Logic equations for signed-carry addition and subtraction are then derived for various codes of interstage carry. Reduction of these operations to ordinary addition and subtraction logic, as well as reduction of base -2 subtraction to base -2 addition and use of Boolean complements is analyzed. Lastly, addition logic equations are derived for sign flipping as a special case of base -2 addition logic.
Jean P. Chinal
IEEE Trans. Computers1
1975 Mirror arithmetic
abstract
Mirror coding for signed numbers is defined "by means pf a set of primitive powers of two {+2n, −2n−1, …−2°} where signs of the usual set used in 2's complement representation are reversed. Use of the mirror representation is shown as an alternate design approach and is illustrated "by a special purpose adder design in mirror code, by an alternate proof of a basic property of sign-ed-digit arithmetic and as another interpretation of cells used in some array multipliers for signed numbers. Lastly, the concept is used to define a variable mode redundant coding, allowing simple sign-flipping without overflow.
Jean P. Chinal
IEEE Symposium on Computer Arithmetic1
1975 The logic of modulo 2k + 1 adders
abstract
The design of modulo 2k+ 1 adders for arbitrary k is considered, with the objective of achieving a logic structure as regular as possible so as to allow a convenient implementation in large-scale integration technology (LSI). It is shown how the design problem can be reduced to the recursive generation of a subtract signal and to the merging, in various degrees, of the corresponding logic with the logic of an ordinary adder or, alternately, of a so-called signed-carry adder which is defined and designed itself in general, with both recursive and explicit carry schemes. Modulo 2k+ 1 adder designs are given, one with conventional adder, another based on signed-carry adder and a third, derived from the signed-carry scheme, where subtract signal generation and carry logic are merged. This last scheme can be set up with two backward recursion chains and five or six forward ones. Two more basic variants are finally indicated for this integrated scheme, aiming at reducing as much as possible the residual logic structure irregularity presented by the most significant position in the word
Jean P. Chinal
IEEE Symposium on Computer Arithmetic1
1972 Some Comments on Postcorrections for Nonrestoring Division
abstract
Assumptions for the problem of postcorrection in nonrestoring division, as treated in a previous note by Rhyne, are reviewed. A specific type of quotient and remainder with the so-called concatenation property is then defined for. signed operands. A criterion is also given, extending the one given by Rhyne, to determine postcorrections applicable to quotient and remainder resulting from nonrestoring division, so as to obtain the concatenation property, and is applied to a specific example.
Jean P. Chinal
IEEE Trans. Computers1