EDBT 2026 Demo / reviewers in the wild / expert

Rajeev Jog

dblp:54/4677 · DBLP profile ↗
← Back
2ranked-venue papers
1as first author
0since 2021 · last 1990
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 33% Processor architecture and microarchitecture · 33% Memory systems · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › cache coherence
cache-coherent shared memory		 0.011990
Performance Evaluation of a Commercial Cache-Coherent Shared Memory Multiprocessor · SIGMETRICS 1990
Performance modeling and evaluation › queueing models
mean value analysis		 0.011990
Performance Evaluation of a Commercial Cache-Coherent Shared Memory Multiprocessor · SIGMETRICS 1990
Processor architecture and microarchitecture › multiprocessor architecture
symmetric multiprocessor		 0.011990
Performance Evaluation of a Commercial Cache-Coherent Shared Memory Multiprocessor · SIGMETRICS 1990

Methods — techniques the papers use, named apart from their topics

approximate mean value analysis · 0.0
YearPublicationVenuePosition
1990 Performance Evaluation of a Commercial Cache-Coherent Shared Memory Multiprocessor
abstract
This paper describes an approximate Mean Value Analysis (MVA) model developed to project the performance of a small-scale shared-memory commercial symmetric multiprocessor system. The system, based on Hewlett Packard Precision Architecture processors, supports multiple active user processes and multiple execution threads within the operating system.
Rajeev Jog, Philip L. Vitale, James R. Callister
 SIGMETRICS1
1989 Performance Analysis of Hierarchical Cache-Consistent Multiprocessors
Mary K. Vernon, Rajeev Jog, Gurindar S. Sohi
 Perform. Evaluation2