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Matthias Klein

dblp:54/6175 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2020
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 61% Hardware accelerators and domain-specific architectures · 30% Cloud and datacenter computing · 9%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures › domain-specific accelerator
compression accelerator
0.412020
Data Compression Accelerator on IBM POWER9 and z15 Processors : Industrial Product · ISCA 2020
Storage systems
data compression
0.412020
Data Compression Accelerator on IBM POWER9 and z15 Processors : Industrial Product · ISCA 2020
Storage systems › data compression
lossless compression
0.412020
Data Compression Accelerator on IBM POWER9 and z15 Processors : Industrial Product · ISCA 2020

Methods — techniques the papers use, named apart from their topics

on-chip integration · 0.4
YearPublicationVenuePosition
2020 Data Compression Accelerator on IBM POWER9 and z15 Processors : Industrial Product
abstract
Lossless data compression is highly desirable in enterprise and cloud environments for storage and memory cost savings and improved utilization I/O and network. While the value provided by compression is recognized, its application in practice is often limited because it's a processor intensive operation resulting low throughput and high elapsed time for compression intense workloads.The IBM POWER9 and IBM z15 systems overcome the shortcomings of existing approaches by including a novel on-chip integrated data compression accelerator. The accelerator reduces processor cycles, I/O traffic, memory and storage footprint of many applications practically with zero hardware cost. The accelerator also eliminates the cost and I/O slots that would have been necessary with FPGA/ASIC based compression adapters. On the POWER9 chip, a single accelerator uses less than 0.5% of the processor chip area, but provides a 388x speedup factor over the zlib compression software running on a general-purpose core and provides a 13x speedup factor over the entire chip of cores. On a POWER9 system, the accelerators provide an end-to-end 23% speedup to Apache Spark TPC-DS workload compared to the software baseline. The z15 chip doubles the compression rate of POWER9 resulting in even much higher speedup factors over the compression software running on general-purpose cores. On a maximally configured z15 system topology, on-chip compression accelerators provide up to 280 GB/s data compression rate, the highest in the industry. Overall, the on-chip accelerators significantly advance the state of the art in terms of area, throughput, latency, compression ratio, reduced processor utilization, power/energy efficiency, and integration into the system stack.This paper describes the architecture, and novel elements of the POWER9 and z15 compression/decompression accelerators with emphasis on trade-offs that made the on-chip implementation possible.
Bülent Abali, Bart Blaner, John J. Reilly, Matthias Klein, Craig B. Agricola, Bedri Sendir, Alper Buyuktosunoglu, Christian Jacobi 0002, William J. Starke, Haren Myneni
ISCA4
2016 Description of an intelligent resource unit for a smart production
abstract
Future automated systems are connected to each other in a production network with the goal to manage, schedule and operate the manufacturing process of individual products autonomously. Therefore a semantic language is necessary to empower the systems to fulfil their tasks. In this content eCl@ss is often mentioned as applicable to describe products. In this paper we conduct a study to describe an intelligent barrel with eCl@ss in terms of completeness in objective and functional description to evaluate if it is sufficient for the needs of cyber physical systems (CPS).
Matthias Klein, Markus Leitzgen, Michael Weyrich
ETFA1