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Alan Rotman

dblp:54/6222 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › logic synthesis
finite state machine synthesis		 0.011993
Control unit synthesis from a high-level language · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation
logic synthesis		 0.011993
Control unit synthesis from a high-level language · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993

Methods — techniques the papers use, named apart from their topics

high-level language synthesis · 0.0
YearPublicationVenuePosition
1993 Control unit synthesis from a high-level language
abstract
Control Unit Synthesizer (CUS) is a language and a synthesizer for generating VLSI layouts of control units from a user's functional specification. CUS synthesizes multiple finite state machines (FSMs), which are organized hierarchically and interconnected by global variables and a FORK/JOIN protocol. High-level constructs like WHILE loops. FOR loops, registered and nonregistered variables, arbitrarily complex Boolean expressions, and nested statements allow the user to write descriptions of FSMs in a natural manner. The generated circuit is simulated at the logic-level using symbolic names. The resulting layout size is similar or better than manual layout.>
Alan Rotman, Ran Ginosar
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1