Demo Data from EDBT 2026 / reviewers in the wild / expert
Maheshwar Umasankar
dblp:54/6318
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1995
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 44% Interconnection networks and networks-on-chip · 44% Electronic design automation · 13% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › clocking
clock distribution |
0.0 | 1 | 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes · IEEE Trans. Parallel Distributed Syst. 1995 |
Interconnection networks and networks-on-chip › network topology
mesh network |
0.0 | 1 | 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes · IEEE Trans. Parallel Distributed Syst. 1995 |
Integrated circuit design › analog and mixed-signal circuits › analog circuit design
network synthesis |
0.0 | 1 | 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes · IEEE Trans. Parallel Distributed Syst. 1995 |
Interconnection networks and networks-on-chip
network topology |
0.0 | 1 | 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes · IEEE Trans. Parallel Distributed Syst. 1995 |
Electronic design automation › physical design
clock network synthesis |
0.0 | 1 | 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes · IEEE Trans. Parallel Distributed Syst. 1995 |
Electronic design automation
physical design |
0.0 | 1 | 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes · IEEE Trans. Parallel Distributed Syst. 1995 |
Methods — techniques the papers use, named apart from their topics
tiling · 0.0replication · 0.0link cost optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1995 | Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and HypercubesabstractBranch-and-Combine (BaC) clock distribution has recently been introduced. The most interesting aspect of the new scheme is its ability to bound skew by a constant irrespective of network size. In this paper, we introduce algorithms for systematic synthesis of BaC networks for clocking meshes, tori, and hypercubes of different dimensionalities. For meshes our approach relies on filing techniques. We start with the identification of basic proper tiles satisfying certain criteria. We define a set of valid transformations on tiles. By appropriately applying a sequence of transformations on a basic proper tile, one could synthesize a valid BaC network. We formally introduce methods and procedures for applying the above steps to systematically construct different valid BaC network designs for 2D and 3D meshes. To construct BaC networks for clocking hypercubes of any dimensionality we describe a formal methodology. In this case, we utilize an approach called replication which is based on constructing larger hypercube clocking networks from smaller ones. We combine the techniques for 2D, 3D meshes with replication techniques to formulate a methodology applicable to meshes and tori of dimensionality greater than three. We provide proofs of correctness for the algorithms we introduce. Besides, we formally define an optimality criterion based on link costs which is utilized to check the optimality of the synthesized network designs. In the case of meshes, we show that the majority of synthesized networks are optimal with respect to our defined criterion. For those suboptimal networks, we describe a procedure for identifying and removing unnecessary (redundant) links. The procedure is guaranteed to optimize the network without changing its behavioral parameters. Maheshwar Umasankar, Ahmed A. El-Amawy |
IEEE Trans. Parallel Distributed Syst. | 1 |