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Sergio Bernstein

dblp:55/10974 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1976
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 87% Interconnection networks and networks-on-chip · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation
0.011976
Transmission line models, a unified physical network approach · DAC 1976
Electronic design automation › interconnect modeling
transmission line modeling
0.011976
Transmission line models, a unified physical network approach · DAC 1976
Interconnection networks and networks-on-chip › high-speed interconnect
high-speed interconnect modeling
0.011976
Transmission line models, a unified physical network approach · DAC 1976

Methods — techniques the papers use, named apart from their topics

physical network models · 0.0
YearPublicationVenuePosition
1976 Transmission line models, a unified physical network approach
abstract
Digital signals in high-speed computers and communications systems require that even short interconnections be treated as transmission lines, and existing circuit analysts programs (ECAP-II, ASTAP, SCEPTRE, I/TRAC-II) have been used effectively to model lossless and non-dispersive lines.
Sergio Bernstein
DAC1