Michael S. Karasick

dblp:55/1253 · also Michael Karasick · DBLP profile ↗
← Back
7ranked-venue papers
5as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Graphics, computer vision, multimedia, augmented reality and games · 3 · 3 first-authorTheory of computation · 2 · 1 first-authorSystems, architecture and hardware · 1Software engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 44% Programming languages and type systems · 44% Software maintenance and evolution · 13%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 90% Parallel and multicore computing · 10%
Theoretical computer science
2 papers
Computational geometry · 100%
Computer graphics and multimedia
1 paper
Geometric modeling and processing · 100%

Topics — the 10 heaviest of 12, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
incremental compilation
0.011998
The Architecture of Montana: An Open and Extensible Programming Environment with an Incremental C++ · SIGSOFT FSE 1998
Programming languages and type systems
programming environment
0.011998
The Architecture of Montana: An Open and Extensible Programming Environment with an Incremental C++ · SIGSOFT FSE 1998
Geometric modeling and processing
solid modeling
0.011995
Intersecting Solids on a Massively Parallel Processor · ACM Trans. Graph. 1995
Electronic design automation › CAD framework
design tool integration
0.011994
Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
Electronic design automation
technology computer-aided design
0.011994
Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
Electronic design automation › design for manufacturability
wafer representation
0.011994
Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
Computational geometry › triangulation
delaunay triangulation
0.011991
Efficient Delaunay Triangulation using Rational Arithmetic · ACM Trans. Graph. 1991
Computational geometry › robust geometric computation
exact geometric computation
0.011991
Efficient Delaunay Triangulation using Rational Arithmetic · ACM Trans. Graph. 1991
Computational geometry
robust geometric computation
0.011988
Towards Implementing Robust Geometric Computations · SCG 1988
Electronic design automation › technology computer-aided design
process simulation
0.011994
Semiconductor wafer representation for TCAD · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994

Methods — techniques the papers use, named apart from their topics

parallel intersection algorithm · 0.0persistent code cache · 0.0incremental compilation · 0.0object-oriented design · 0.0rational arithmetic · 0.0adaptive-precision determinant sign computation · 0.0floating-point arithmetic · 0.0exact arithmetic · 0.0
YearPublicationVenuePosition
1998 The Architecture of Montana: An Open and Extensible Programming Environment with an Incremental C++
abstract
Montana is an open, extensible integrated programming environment for C++ that supports incremental compilation and linking, a persistent code cache called a CodeStore, and a set of programming interfaces to the CodeStore for tool writers. CodeStore serves as a central source of information for compiling, browsing, and debugging. CodeStore contains information about both the static and dynamic structure of the compiled program. This information spans files, macros, declarations, function bodies, templates and their instantiations, program fragment dependencies, linker relocation information, and debugging information.Montana allows the compilation process to be extended and modified [11]. Montana has been used as the basis of a number of tools [1,7], and is also used as the infrastructure of a production compiler, IBM's Visual Age C++ 4.0 [8].
Michael S. Karasick
SIGSOFT FSE1
1997 Visualization of Three-Dimensional Delaunay Meshes
Michael S. Karasick, Derek Lieber, Lee R. Nackman, V. T. Rajan
Algorithmica1
1995 Intersecting Solids on a Massively Parallel Processor
abstract
Solid modeling underlies many technologies that are key to modern manufacturing. These range from CAD systems to robot simulators, from finite-element analysis to integrated circuit process modeling. The accuracy, and hence the utility, of these models is often constrained by the amount of computer time required to perform the desired operations. In this paper we present, in detail, an efficient algorithm for parallel intersections of solids using the Connection Machine, a massively parallel SIMD processor. We describe the data structure for representing the solid models and detail the intersection algorithm, giving special attention to implementation issues. We provide performance results, comparing the parallel algorithm to a serial intersection algorithm.
Michael S. Karasick, David Strip
ACM Trans. Graph.1
1994 Semiconductor wafer representation for TCAD
abstract
This work describes the Semiconductor Wafer Representation (SWR) for representing and manipulating wafer state during process and device simulation. The goal of the SWR is to provide an object-oriented interface to a collection of functions designed for developing and integrating Technology CAD (TCAD) applications. By providing functions which can be common across many applications, we aim to greatly reduce tool development and integration time. Corporate, vendor, and university TCAD developers have worked together under the auspices of the CAD Framework Initiative to create an architecture and C++ programming interface for an SWR 1.0 draft standard. Here we describe this architecture and the results of creating and using a prototype implementation of the standard both to integrate existing TCAD tools and to develop simple new tools.>
Martin D. Giles, Duane S. Boning, Goodwin R. Chin, Walter C. Dietrich Jr., Michael S. Karasick, Mark E. Law, Purnendu K. Mozumder, Lee R. Nackman, V. T. Rajan, D. M. H. Walker, Robert H. Wang, Alexander S. Wong
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.5
1991 Efficient Delaunay Triangulation using Rational Arithmetic
abstract
Many fundamental tests performed by geometric algorithms can be formulated in terms of finding the sign of a determinant. When these tests are implemented using fixed precision arithmetic such as floating point, they can produce incorrect answers; when they are implemented using arbitrary-precision arithmetic, they are expensive to compute. We present adaptive-precision algorithms for finding the signs of determinants of matrices with integer and rational elements. These algorithms were developed and tested by integrating them into the Guibas-Stolfi Delaunay triangulation algorithm. Through a combination of algorithm design and careful engineering of the implementation, the resulting program can triangulate a set of random rational points in the unit circle only four to five times slower than can a floating-point implementation of the algorithm. The algorithms, engineering process, and software tools developed are described.
Michael S. Karasick, Derek Lieber, Lee R. Nackman
ACM Trans. Graph.1
1989 The same-object problem for polyhedral solids
Michael S. Karasick
Comput. Vis. Graph. Image Process.1
1988 Towards Implementing Robust Geometric Computations
Christoph M. Hoffmann, John E. Hopcroft, Michael S. Karasick
SCG3