Bridging the gap between high-level algorithm development and efficient FPGA implementation remains a fundamental challenge, particularly in latency- and resource-constrained domains such as wireless communications. In practice, many signal processing and communication algorithms are first developed and validated at the software level, where rapid iteration and numerical flexibility are critical, making MATLAB a de facto environment for algorithm prototyping and verification. To deploy these algorithms on FPGA platforms, High-Level Synthesis (HLS) is commonly adopted as an intermediate step that enables hardware generation from high-level descriptions. Although HLS significantly improves productivity compared with register-transfer level design, translating MATLAB models into high-quality HLS implementations still requires substantial manual effort and deep domain expertise. Designers must carefully restructure computation patterns, redesign dataflows, and tune synthesis parameters to meet strict performance and resource constraints. Recent advances in large language models (LLMs) suggest a promising direction for automating this translation process. However, current LLM-based approaches remain unreliable in complex hardware design workflows, as they suffer from hallucinations, forgetting, limited domain expertise, and often overlook key performance metrics such as latency, throughput, and resource utilization.

This paper presents an HLS-based algorithm-hardware co-design methodology and complete FPGA hardware accelerator for multi-user massive MIMO-OFDM receivers operating in contested tactical environments with jamming suppression capabilities. We develop a systematic bi-directional co-design methodology using high-level synthesis (HLS) where algorithms provide functional verification constraints while hardware synthesis feedback drives algorithmic complexity reduction, enabling efficient transformation from signal processing algorithms to optimized circuit implementations on the Xilinx ZCU111 radio frequency system-on-chip (RFSoC) platform. The primary contributions include: 1) hardware architecture innovations featuring QR decomposition-based synchronization achieving 330 MHz post-route operation and optimized frequency-domain minimum mean square error (FD-MMSE) equalization with systematic loop restructuring for data dependency removal in substitution modules, reducing hardware resources by 56% lookup tables (LUTs), 58% flip-flops (FFs), and 67% digital signal processing (DSP) blocks while maintaining real-time throughput; 2) systematic HLS-based co-design framework enabling automated architecture exploration with hardware-oriented algorithm adaptations including silent-period frame structure and Cholesky-based decision-feedback equalization; 3) complete system integration validated through field trials demonstrating 8 dB jamming suppression improvement with reliable spatial division multiple access (SDMA) communications. The presented methodology provides insights applicable to broader signal processing systems with stringent real-time constraints.

For wideband transceivers operating at millimeter wave and terahertz frequencies, the implementation of conventional digital predistortion for nonlinearity mitigation faces significant challenges due to the limited availability and/or complexity of high-speed digital signal processing. In this paper, a simple received signal model is proposed for wideband system with nonlinearity and other practical impairments, such as transmitter (Tx) and receiver (Rx) I/Q imbalances (IQIs), carrier frequency offset (CFO), and phase noise, to enable low-complexity impairment mitigation. An expanded memory polynomial (EMP) model is firstly proposed to capture Tx IQI and the nonlinearity over the entire transceiver chain. Exploiting the CFO and a novel transmission protocol, a blind Rx IQI estimation is also proposed. The noise enhancement after Rx IQI and CFO compensation is then evaluated as a noise factor related to the mean-square-error of the Rx IQI estimation. As a result, the received signal of the wideband system is finally modelled as an EMP plus additive noises followed by a band-limited noisy receiver filter. Simulation results using a millimeter wave system with 2.5 GHz bandwidth and 73.5 GHz carrier frequency are presented to verify the accuracy of the EMP modelling and validate the theoretical analyses.

Wideband millimeter wave and terahertz systems face severe nonlinearity and other practical impairments such as transmitter and receiver in-phase/quadrature imbalances (IQIs), carrier frequency offset, and phase noise. Based on a simplified yet effective received signal model including an expanded memory polynomial (EMP) and a noisy receiver filter, this paper proposes a low-complexity digital post-cancellation (DPC) framework for transmitter IQI and overall system nonlinearity mitigation. The nonlinearity parameters with reduced nonlinearity order are firstly estimated with low-complexity using a novel transmission protocol incorporating both frame rotation and preamble power scaling. Through widely linear system equalization and interference cancellation, the signal distortion caused by frequency-dependent IQI and nonlinearity is then mitigated with significant performance improvement. The mean-squared-error measurement of the EMP-modelled signals also provides a practical means for the nonlinear system identification and characterization. Both simulation and experiment results obtained from a millimeter wave system with 2.125 GHz bandwidth and 73.5 GHz carrier frequency are presented to verify the theoretical analyses and demonstrate the effectiveness of the DPC technology.

Abstract Due to difficulties in manufacturing, data conversion devices with extremely high sampling rate are becoming the bottleneck in realising high‐speed communication systems with a large bandwidth. Dual pulse shaping (DPS) transmission allows half‐symbol‐rate conversion devices to be used for two parallel data streams to achieve full‐rate transmission, and is proved to be an effective solution. Here, two sets of ideal sinc‐function based complementary Nyquist pulses for DPS transmission are proposed. Theoretically, it is shown that the proposed pulses satisfy the inter‐symbol and cross‐symbol interference‐free conditions, and can achieve full‐Nyquist‐rate transmission with half of the sampling rate. With reference to commercially available D/As, two sets of practical dual spectral shaping pulses are further proposed, and the close relationship between the ideal and practical pulses are disclosed. Performance analysis for linear equalisation is provided in the presence of both timing offset between dual shaping pulses and carrier‐frequency offset. Two approaches are then proposed to improve the system robustness by adjusting the clock phase of the D/As and A/Ds. Simulation results are presented to provide a comparison between the proposed DPS transmission schemes and the state of the art, in terms of the performance metrics of peak‐to‐average power ratio and bit error rate.

© 2019 IEEE A millimeter wave system with commercially available and affordable data conversion devices is presented in this paper for achieving high-speed and low-cost wireless communications. By adopting the proposed dual pulse shaping (DPS) transmission scheme, the system can achieve full Nyquist rate transmission with only half of the sampling rate required by conventional Nyquist pulse shaping. Structures of the DPS transmitter and receiver are described and effective symbol rate equalization techniques suitable for DPS transmission are presented. Simulation results with two sets of practical dual spectral shaping pulses are also provided to compare system performance with the conventional Nyquist pulse shaping system.

The concept of complementary Nyquist pulse is introduced in this paper. Making use of a half rate Nyquist pulse and its complementary one, a dual pulse shaping transmission scheme is proposed, which achieves full Nyquist rate transmission with only a half of the sampling rate required by conventional Nyquist pulse shaping. This is essential for realizing high-speed digital communication systems with available and affordable data conversion devices. The condition for cross-symbol interference free transmission with the proposed dual pulse shaping is proved in theory, and two classes of ideal complementary Nyquist pulses are formulated assuming raised-cosine pulse shaping. Simulation results are also presented to demonstrate the improved spectral efficiency with dual pulse shaping and compare other system performance against conventional Nyquist pulse shaping.

The rapid growth of mobile broadband wireless services in recent years demands high speed data transmission for both access and backhaul networks. With the increase of data rate for 5G access to tens of Gigabits per second (Gbps), higher speed transmission for backhaul network is necessary. Current wireless backhaul systems have been able to achieve the data rate of multiple Gbps, but the ability to deal with significant practical impairments such as large carrier frequency offset and IQ mismatch is still a technical challenge. In this paper, a 20 Gbps digital modem for wireless backhaul applications is proposed. Simulation and field programmable gate array implementation show that the the proposed design and signal processing algorithms meet the targeted system performance.