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Harald Aigner

dblp:55/2941 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2004
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 87% Integrated circuit design · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures
cryptographic accelerator		 0.012004
A Low-Cost ECC Coprocessor for Smartcards · CHES 2004
Hardware accelerators and domain-specific architectures › cryptographic accelerator
elliptic curve processor		 0.012004
A Low-Cost ECC Coprocessor for Smartcards · CHES 2004
Integrated circuit design
low-power circuit design		 0.012004
A Low-Cost ECC Coprocessor for Smartcards · CHES 2004

Methods — techniques the papers use, named apart from their topics

low-cost hardware design · 0.0elliptic curve cryptography · 0.0
YearPublicationVenuePosition
2004 A Low-Cost ECC Coprocessor for Smartcards
Harald Aigner, Holger Bock, Markus Hütter, Johannes Wolkerstorfer
 CHES1