Allan Knies

dblp:55/5574 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2018
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 2Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Memory systems · 69% Energy-efficient computing · 10% Hardware accelerators and domain-specific architectures · 10%
Computer networks
1 paper
Routing and switching · 87% Software-defined and programmable networks · 13%

Topics — the 6 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › memory access optimization
data movement reduction
0.312018
Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks · ASPLOS 2018
Memory systems
processing-in-memory
0.312018
Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks · ASPLOS 2018
Hardware accelerators and domain-specific architectures
machine learning accelerator
0.112018
Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks · ASPLOS 2018
Routing and switching › network processing
parallel packet processing
0.112009
RouteBricks: exploiting parallelism to scale software routers · SOSP 2009
Routing and switching › router architecture
software router
0.112009
RouteBricks: exploiting parallelism to scale software routers · SOSP 2009
Software-defined and programmable networks › programmable network nodes
programmable routers
0.012009
RouteBricks: exploiting parallelism to scale software routers · SOSP 2009

Methods — techniques the papers use, named apart from their topics

workload characterization · 0.3energy profiling · 0.3
YearPublicationVenuePosition
2018 Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks
abstract
We are experiencing an explosive growth in the number of consumer devices, including smartphones, tablets, web-based computers such as Chromebooks, and wearable devices. For this class of devices, energy efficiency is a first-class concern due to the limited battery capacity and thermal power budget. We find that data movement is a major contributor to the total system energy and execution time in consumer devices. The energy and performance costs of moving data between the memory system and the compute units are significantly higher than the costs of computation. As a result, addressing data movement is crucial for consumer devices. In this work, we comprehensively analyze the energy and performance impact of data movement for several widely-used Google consumer workloads: (1) the Chrome web browser; (2) TensorFlow Mobile, Google's machine learning framework; (3) video playback, and (4) video capture, both of which are used in many video services such as YouTube and Google Hangouts. We find that processing-in-memory (PIM) can significantly reduce data movement for all of these workloads, by performing part of the computation close to memory. Each workload contains simple primitives and functions that contribute to a significant amount of the overall data movement. We investigate whether these primitives and functions are feasible to implement using PIM, given the limited area and power constraints of consumer devices. Our analysis shows that offloading these primitives to PIM logic, consisting of either simple cores or specialized accelerators, eliminates a large amount of data movement, and significantly reduces total system energy (by an average of 55.4% across the workloads) and execution time (by an average of 54.2%).
Amirali Boroumand, Saugata Ghose, Youngsok Kim, Rachata Ausavarungnirun, Eric Shiu, Rahul Thakur, Dae-Hyun Kim 0003, Aki Kuusela, Allan Knies, Parthasarathy Ranganathan, Onur Mutlu
ASPLOS9
2009 RouteBricks: exploiting parallelism to scale software routers
abstract
We revisit the problem of scaling software routers, motivated by recent advances in server technology that enable high-speed parallel processing--a feature router workloads appear ideally suited to exploit. We propose a software router architecture that parallelizes router functionality both across multiple servers and across multiple cores within a single server. By carefully exploiting parallelism at every opportunity, we demonstrate a 35Gbps parallel router prototype; this router capacity can be linearly scaled through the use of additional servers. Our prototype router is fully programmable using the familiar Click/Linux environment and is built entirely from off-the-shelf, general-purpose server hardware.
Mihai Dobrescu, Norbert Egi, Katerina J. Argyraki, Byung-Gon Chun, Kevin R. Fall, Gianluca Iannaccone, Allan Knies, Maziar Manesh, Sylvia Ratnasamy
SOSP7