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Junichi Nakamura

dblp:56/10247 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › semiconductor devices › image sensor
CMOS image sensor
0.212013
High-Resolution CMOS Video Image Sensors · Proc. IEEE 2013
Integrated circuit design › semiconductor devices › image sensor
image sensor design
0.212013
High-Resolution CMOS Video Image Sensors · Proc. IEEE 2013

Methods — techniques the papers use, named apart from their topics

pixel rate scaling · 0.2column-parallel readout · 0.2
YearPublicationVenuePosition
2013 High-Resolution CMOS Video Image Sensors
abstract
High-definition television (HDTV) images are now commonly available and the recent trend of video applications is toward even higher spatial resolutions with higher pixel rates. To make such high-resolution video images possible, the sensor must have a line time, or one row time, of less than a few microseconds with a pixel rate greater than gigapixels per second. In this paper, the basics of complementary metal–oxide–semiconductor (CMOS) image sensors and the architectures/technologies used to obtain such high resolutions and frame rates are reviewed and the technologies to obtain the highest possible quality video images are explained.
Isao Takayanagi, Junichi Nakamura
Proc. IEEE2