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Abdessatar Abderrahman

dblp:56/204 · DBLP profile ↗
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3ranked-venue papers
3as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 1 heaviest of 1, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
analog circuit testing
0.011999
Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1999

Methods — techniques the papers use, named apart from their topics

sequential quadratic programming · 0.0relational interval arithmetic · 0.0constraint satisfaction · 0.0constraint logic programming · 0.0
YearPublicationVenuePosition
1999 Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits
abstract
We present an algorithm for automatically generating minimal test sets for parametric faults in linear analog circuits. In a previous work we elaborated a multifrequency test generation method (TPG) for such circuit faults. The method was formulated as a series of optimization problems that were solved by sequential quadratic programming (SQP) available in MATLAB. Such a standard optimization method processes local information and, consequently, cannot guarantee that the found solution is global. This may lead to a poor test selection. Furthermore, the method is semiautomatic and depends on various parameters that must be selected by an experienced user. In this paper, we propose a method based on constraint logic programming (CLP) using relational interval arithmetic (RIA) to solve these optimization problems as a series of constraint satisfaction problems (CSPs). The method is fully automatic and provides tight and guaranteed bounds on the true range of a multivariable nonlinear function. The correctness of the bounds stems from the enumeration of subdivisions of the function and its variable domains while discarding those subdivisions containing no solution. The tightness (i.e., the closeness to the true range) of the bounds can be refined to any desired degree by increasing the fineness of subdivisions imposed on the variable domains and the stringency of the termination criterion at the cost of an increased CPU time. The TPG method was implemented in CLP (BNR) prolog. The effectiveness of our approach is illustrated on a number of nonlinear functions known to be difficult, and two realistic electronic circuits in the context of TPG. Our algorithm accelerated the computation of the various parameters related to the test of a biquadratic filter by a factor ranging from 11 to 29 as compared to the Monte Carlo method.
Abdessatar Abderrahman, Eduard Cerny, Bozena Kaminska
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1997 CLP-based Multifrequency Test Generation for Analog Circuits
abstract
In our previous work we elaborated a multifrequency test generation method (TPG) for detecting parametric and catastrophic faults in linear analog circuits. The method was formulated as an optimization problem which was solved by Sequential Quadratic Programming (SQP), a non-linear programming method available in MATLAB. Such standard optimization methods are based on and process local information and consequently cannot guarantee a global optimum. In this paper we propose a method based on Constraint Logic Programming (CLP) that solves the optimization problem in TPG as a series of Constraint Satisfaction Problems (CSPs). Our TPG method is fully automatic and provides right and guaranteed bounds on the global optima of a nonlinear function. The TPG method was implemented in CLP(BNR) Prolog. First, we illustrate the effectiveness of our approach on a number of nonlinear functions known to be difficult, and then we apply it to a realistic electronic circuit in the context of TPG. The two methods produce the same results except for one case where SQP falls into a local minimum. This could lead to a wrong test selection. Moreover, while the TPG took over a week of work using SQP, it was solved in a matter of minutes using CLP.
Abdessatar Abderrahman, Eduard Cerny, Bozena Kaminska
VTS1
1996 Optimization-based multifrequency test generation for analog circuits
Abdessatar Abderrahman, Bozena Kaminska, Eduard Cerny
J. Electron. Test.1