Inner product arguments (IPA) are arguments of knowledge that two committed vectors satisfy an inner product relation. With the recursive proof technique by Bootle et al. 2016, the size of IPA proofs only grows logarithmically in the length of the vectors, without a trusted setup. The succinct proof makes IPAs well suited for blockchain applications. However, current IPA can only handle a vector with length a power of 2, which limits the application of the argument. One direct solution is to pad the vectors with zeros, which incurs additional overhead. We propose Springproofs, a new framework deriving IPAs from many existing IPA schemes. Springproofs are natively compatible with vectors of arbitrary length. With a novel recursive compression structure, Springproofs achieve the same proof size as the original IPA but with more efficient computation. In particular, we instantiate Springproofs with Bulletproofs and find the optimal recursive structure for the IPA. First, we experimentally show that Springproofs are almost twice as fast as Bulletproofs for range proof, when the vector length is slightly larger than a power of 2. Afterwards, we incorporate the Springproofs into Monero, a popular cryptocurrency supporting privacy in transactions, revealing that the Springproofs based Monero outperforms Bulletproofs based Monero both in generating and verifying transactions. Moreover, we apply the Springproofs to the general arithmetic circuit, including SHA256, Merkle tree, and typical statistics, the performances on which are better than the performances by using Bulletproofs. Interestingly, Springproofs increase the range of parameters on which the performance of Bulletproofs exceeds that of Groth16, meanwhile naturally inherit the advantages of Bulletproofs, e.g., without initial trusted setup, aggregation, and batch verification. As a result, Springproofs have many promising applications, including confidential transactions in cryptocurrency and privacy computing for specific arithmetic circuits in smart contracts.

Detecting the newly emerging malware variants in real time is crucial for mitigating cyber risks and proactively blocking intrusions. In this paper, we propose MG-DVD, a novel detection framework based on dynamic heterogeneous graph learning, to detect malware variants in real time. Particularly, MG-DVD first models the fine-grained execution event streams of malware variants into dynamic heterogeneous graphs and investigates real-world meta-graphs between malware objects, which can effectively characterize more discriminative malicious evolutionary patterns between malware and their variants. Then, MG-DVD presents two dynamic walk-based heterogeneous graph learning methods to learn more comprehensive representations of malware variants, which significantly reduces the cost of the entire graph retraining. As a result, MG-DVD is equipped with the ability to detect malware variants in real time, and it presents better interpretability by introducing meaningful meta-graphs. Comprehensive experiments on large-scale samples prove that our proposed MG-DVD outperforms state-of-the-art methods in detecting malware variants in terms of effectiveness and efficiency.

In analog/mixed-signal (AMS) integrated circuits (ICs), most of the layout design efforts are still handled manually, which is time-consuming and error-prone. Given the previous high-quality manual layouts containing valuable design expertise of experienced designers, exploring layout design constraints from the existing layouts is desirable. In this paper, we extract and explore analog placement constraints from previous quality-approved layouts, including regularity and symmetry (symmetry-island) constraints. For the first time, an efficient sweep line-based algorithm is developed to comprehensively extract the regularity constraints in a given analog placement, which can not only improve routability but also minimize the layout parasitics-induced circuit performance degradation. Furthermore, we propose a novel layout technology migration and performance retargeting framework, where we apply the constraint extraction algorithms to improve the placement quality while preserving previous design expertise. Experimental results show that the proposed techniques can preserve the symmetry and regularity constraints, and also reduce the placement area by 7.6% on average.

We present a novel secret sharing scheme where the secret is an autotopism (a symmetry) of a Latin square. Previously proposed secret sharing schemes involving Latin squares have many drawbacks: (a) Latin squares contain $$n^2$$ entries, which may be too large, (b) partial information about the secret may be directly revealed, (c) a subsequently discovered subtle “flaw”, (d) difficulty in initialization and reconstruction, (e) difficulty in verification, and (f) difficulty in generalizing to a multi-level scheme. We carefully analyze the security of the proposed scheme, and identify how it overcomes all of these problems.

Digital watermarking is a valid solution to protect copyright of owners. But there is still a difficult problem of copyright disputes as the IBM attack or the interpretation attack when multiple watermarks of multiple authors appear in the same digital media. We provide a new feasible solution, in which a multiple watermarking scheme using complete complementary code based on the spread spectrum is adopted, and the scaling parameters are used to identify embedding-order of different users. The independency of multiple watermarks can also be used to protect privacy of different users.

Fractional order differential equations (FODE) provides a more flexible approach to describe dynamic systems. However, the extra flexibility poses a difficult problem in system identification, which requires not only the estimation of model coefficients but also the determination of fractional orders. They are coupled nonlinearly. In addition, the model coefficients in a FODE are shown nonlinearly coupled with respect to the often used Sum Squared Error (SSE) objective function. In this article, a two-layer approach is designed to estimate fractional orders and model coefficients iteratively. An intermediate step that estimates model coefficients is also introduced to address the nonlinear coupling of coefficients in a SSE. In the subsequent simulation for electrochemical systems, it is found that prior knowledge on physical systems being modeled is necessary to create optimization constraints and justify the results.

In this article, we introduce a powerful software tool Engineering Equation Solver (EES) and apply it to create steady state and dynamic models for a reverse osmosis (RO) desalination system. EES is a general equation-solving program that can numerically solve thousands of coupled nonlinear algebraic equations. It can also be used to solve differential equations and optimization problems. In RO desalination system design, amount of coupled differential equations related to mass balance and momentum balance need to be solved to develop system model. Hence, by applying EES to solve differential equations is a very efficient and effective method to build RO desalination system model. Comparing with Matlab, EES has the advantage of easy programming and fast convergence speed. It significantly reduces the time spending for programming to solve nonlinear equations and researchers can focus on RO system optimal design and analysis.

We combine the concepts of thep-periodic Legendre sequence, the(q-1)-periodic Sidelnikov sequence and the two-prime generator to introduce a newp(q-1)-periodic sequence called Legendre-Sidelnikov sequence. We show that this new sequence is balanced ifp=q. For an arbitrary odd primepand an arbitrary powerqof an odd prime withgcd (p,q-1)=1 we determine the exact values of its (periodic) autocorrelation function and deduce an upper bound on its aperiodic autocorrelation function showing that it is small compared to its period.

In this paper, we apply C-slow retiming and asynchronous deep pipelining to maximize the throughput-area efficiency of fully parallel low-density-parity-check (LDPC) decoding. Pipelined decoders are implemented in a 0.18 mum FDSOI CMOS process. Experimental results show that our pipelining technique is an efficient approach to maximizing LDPC decoding throughput while minimizing the area consumption. First, pipelined decoders can achieve extraordinary high throughput which non-pipelined design cannot. Second, for the same throughput, pipelined decoders use less area than non-pipelined design. Our approach can improve the throughput of a published implementation by 4 times with only about 80% area overhead. Without using clocks, proposed asynchronous pipelined decoders are more scalable in design complexity and more robust to process-voltage-temperature variations than existing clock-based LDPC decoders.

A new threshold time series model is proposed, whose submodels are extended from AR to SARIMA and whose domains having thresholds are extended to two. By these two extensions, the newly proposed models would offer more flexibility to piecewisely approximate nonstationary time series by a finite number of local stationary models. Genetic algorithm is applied to simultaneously search for appropriate model structures, estimate the optimal model coefficients, as well as to partition space by finding appropriate thresholds. The resulting model is applied to a synthetic multi-frequency sine wave and two financial time series with improved modeling quality. The proposed model is also applied for seismogram analysis to recognize earthquake wave pattern in order to locate arrival time of different waves.

Some properties of pn-periodic sequences over Fpwith fixed linear complexity value are found. Based on this, the distribution of the 1-error linear complexity of pn-periodic sequences over Fpis provided. The expectation of the 1-error linear complexity of random pn-periodic sequences over Fpis calculated and its estimated range is given. According to these results, an efficient algorithm for computing the 1-error linear complexity of a pn-periodic sequence, as well as a new algorithm for determining all the error vectors that give the 1-error linear complexity, is proposed

MPEG-4 has recently adopted the fine granularity scalability (FGS) video coding technology which enables easy and flexible adaptation to bandwidth fluctuations and device capabilities. Encryption for FGS should preserve such adaptation capabilities and allow intermediate stages in the delivery to process the media on the ciphertext directly. In this paper, we propose a novel scalable access control scheme with this property for the MPEG-4 FGS format. It offers free browsing of the low-quality base layer video but controls the access to the enhancement layer at different service levels based on either PSNR or bitrates. Both types of service levels are supported simultaneously without jeopardizing each other's security. The scheme is fast and degrades neither compression efficiency nor error resilience of the MPEG-4 FGS. The approach is also applicable to other scalable multimedia.

In this paper, a high-level design system called VIDE (Visual VHDL Integrated Design Environment) is presented. In VIDE, there are several graphical and textual mixed design entry tools (VDES=Visual Design Entry System) and a graphical object-oriented debugger (VDBG=Visual DeBuGger). VDES consists of several diagram editors and a visual text editor, while VDBG is a debugging environment based on a hierarchical VHDL simulator. The graphical objects can be specified as a debugging target.