Demo Data from EDBT 2026 / reviewers in the wild / expert
Aamer Mahmood
dblp:56/5401
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 1988
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware reliability and fault tolerance · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware reliability and fault tolerance › error detection
concurrent error detection |
0.0 | 1 | 1988 | Concurrent Error Detection Using Watchdog Processors - A Survey · IEEE Trans. Computers 1988 |
Hardware reliability and fault tolerance › fault-tolerant architecture
watchdog processor |
0.0 | 1 | 1988 | Concurrent Error Detection Using Watchdog Processors - A Survey · IEEE Trans. Computers 1988 |
Hardware reliability and fault tolerance › error detection
control flow checking |
0.0 | 1 | 1988 | Concurrent Error Detection Using Watchdog Processors - A Survey · IEEE Trans. Computers 1988 |
Methods — techniques the papers use, named apart from their topics
capability-based addressing · 0.0assertion checking · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1988 | Concurrent Error Detection Using Watchdog Processors - A SurveyabstractConcurrent system-level error detection techniques using a watchdog processor are surveyed. A watchdog processor is a small and simple coprocessor that detects errors by monitoring the behavior of a system. Like replication, it does not depend on any fault model for error detection. However, it requires less hardware than replication. It is shown that a large number of errors can be detected by monitoring the control flow and memory-access behavior. Two techniques for control-flow checking are discussed and compared with current error-detection techniques. A scheme for memory-access checking based on capability-based addressing is described. The design of a watchdog for performing reasonable checks on the output of a main processor by executing assertions is discussed.> Aamer Mahmood, Edward J. McCluskey |
IEEE Trans. Computers | 1 |
| 1985 | Concurrent System-Level Error Detection Using a Watchdog Processor
Aamer Mahmood, Edward J. McCluskey, Aydin Ersoz |
ITC | 1 |
| 1983 | Concurrent Fault Detection Using a Watchdog Processor and Assertions
Aamer Mahmood, Edward J. McCluskey, David J. Lu |
ITC | 1 |