A parallel multiplier design based on the five-counter cell is discussed. A design optimization for the performance in speed is proposed at the logic design level which is developed into an MOS circuit design. The comparison of the five-counter cell design and the full adder cell design reveals that the proposed design is most useful with pass gate logic and results in high-speed multiplication (approximately twice as fast as that of the full adder design) with a moderate increase in hardware complexity. With the five-counter design, an improvement in the hardware complexity of a squarer can be expected.>

Algorithms for the parallel multiplication of two n- bit binary numbers by an iterative array of logic cells are discussed. The regular interconnection structures of the multiplier array cell elements, which are ideal for VLSI implementation, are described. The speed and hardware complexity of two new iterative array algorithms, both of which require n-cell delays for one n-bit × n-bit multiplication, are compared to a straightforward iterative array algorithm having a 2n-cell delay and its higher radix version having an n-cell delay.

This paper describes the physical design and characteristics of FS-400M submarine optical repeater housing which has the ability to withstand the severe deep-sea environment for more than 25 years. In this repeater housing, a heat-dispersive and shock-absorbing structure using AI powder mixtured rubber cushion and metal fin, an optical and power feedthrough using epoxy resin and solder, a caulking-type cable termination with multi-hole sleeve, and a completely insulated joint chamber located in a cable coupling are developed.

Lower bounds on the required number of crosspoints in concentrators, a class of interconnection networks, are given. The lower bounds are obtained from a straightforward necessary condition on the number of crosspoints in sparse crossbar full capacity concentrators. Because this condition must be satisfied by all full capacity concentrators embedded in more general concentrators, the general necessary condition is established. Several sparse crossbar designs that contain the minimum number of crosspoints are presented. An extension of the results to a more general class of interconnection networks is described.