Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval of texture during rasterization, and the application is responsible for managing this memory. The push architecture has a bandwidth advantage, but disadvantages of limited texture capacity, escalation of accelerator memory requirements (and therefore cost), and poor memory utilization. The push architecture also requires the programmer to solve the bin-packing problem of managing accelerator memory each frame. More recently graphics hardware on PC-class machines has moved to an implementation of what we call the pull architecture. Texture is stored in system memory and downloaded by the accelerator as needed. The pull architecture has advantages of texture capacity, stems the escalation of accelerator memory requirements, and has good memory utilization. It also frees the programmer from accelerator texture memory management. However, the pull architecture suffers escalating requirements for bandwidth from main memory to the accelerator. In this paper we propose multi-level texture caching to provide the accelerator with the bandwidth advantages of the push architecture combined with the capacity advantages of the pull architecture. We have studied the feasibility of 2-level caching and found the following: (1) significant re-use of texture between frames; (2) L2 caching requires significantly less memory than the push architecture; (3) L2 caching requires significantly less bandwidth from host memory than the pull architecture; (4) L2 caching enables implementation of smaller L1 caches that would otherwise bandwidth-limit accelerators on the workloads in this paper. Results suggest that an L2 cache achieves the original advantage of the pull architecture stemming the growth of local texture memory - while at the same time stemming the current explosion in demand for texture bandwidth between host memory and the accelerator.

For most compute environments, adaptive forward differencing is much more efficient when performed using integer arithmetic than when using floating point. Previously low precision integer methods suffered from serious precision problems due to the error accumulation inherent to forward differencing techniques. This paper proposes several different techniques for implementing adaptive forward differencing using integer arithmetic, and provides an error analysis of forward differencing which is useful as a guide for integer AFD implementation. The proposed technique using 32 bit integer values is capable of rendering curves having more than 4K forward steps with an accumulated error of less than one pixel and no overflow problems. A hybrid algorithm employing integer AFD is proposed for rendering antialiased, texture-mapped bicubic surfaces.

Trimmed non-uniform rational B-splines have become a very useful surface representation form in the mechanical CAD industry. Previous rendering methods use the de Boor algorithm to evaluate the surface at equal increments in parameter space. This yields polygons which are then rendered. Alternatively the Oslo algorithm and Boehm's knot insertion algorithms are used in a subdivision approach. In this paper a new method is presented for rendering trimmed NURB surfaces of arbitrary order using the adaptive forward differencing (AFD) technique. This method extends the AFD technique to higher order, efficiently computes the basis matrix for each span, calculates the shading approximation functions for rational surfaces, and trims and image maps NURB surfaces. Trimming is accomplished by using AFD to scan convert the trimming curves in parameter space, thus producing the intersection points between the trim curves and an isoparametric curve across the surface. A winding rule is used to determine the regions bounded by the curve which are then rendered with AFD. The method is suitable for both hardware and software implementations, however, higher order surfaces require very high precision due to the forward difference nature of the algorithm.

An adaptive forward differencing algorithm is presented for rapid rendering of cubic curves and bicubic surfaces. This method adjusts the forward difference step size so that approximately one pixel is generated along an ordinary or rational cubic curve for each forward difference step. The adjustment involves a simple linear transformation on the coefficients of the curve which can be accomplished with shifts and adds. This technique combines the advantages of traditional forward differencing and adaptive subdivision. A hardware implementation approach is described including the adaptive control of a forward difference engine. Surfaces are rendered by drawing many curves spaced closely enough together so that no pixels are left unpainted. A simple curve anti-aliasing algorithm is also presented in this paper. Anti-aliasing cubic curves is supported via tangent vector output at each forward difference step. The adaptive forward differencing algorithm is also suitable for software implementation.

We present several techniques for implementing Phong shading in hardware for bicubic patches. Patches are shaded, not by subdividing into polygons, but by drawing many curves close together leaving no pixel gaps. Each curve is drawn using an adaptive forward difference algorithm which generates the coordinates as well as the shading parameters as cubic functions incrementally evaluated along the curve. The forward difference step size is adaptively adjusted so that it generates approximately one pixel along the curve per forward difference step. The hardware implements Phong shading directly with a surprisingly simple configuration built from general purpose compute units and look-up tables. Two new methods are presented for deriving bicubic approximations to the shading parameters over a bicubic patch. One method uses two Coons patches to approximate the unnormalized N·L, and N·H, and a third Coons patch for N·N, where N is the surface normal, L is the light direction, and H is the direction of maximum highlight. In this case the hardware performs the normalization per pixel. The second method uses two Coons patches to approximate the normalized dot products N·L, and N·H. The method is suitable for both hardware and software implementations.