Demo Data from EDBT 2026 / reviewers in the wild / expert
G. Galati
dblp:56/658
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1978
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 44% Parallel and multicore computing · 44% Hardware accelerators and domain-specific architectures · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
microprogramming |
0.0 | 1 | 1978 | The Serial Microprocessor Array (SMA): Microprogramming and Application Examples · ISCA 1978 |
Parallel and multicore computing › array processor
parallel array processor |
0.0 | 1 | 1978 | The Serial Microprocessor Array (SMA): Microprogramming and Application Examples · ISCA 1978 |
Hardware accelerators and domain-specific architectures › signal processing accelerator
radar signal processing accelerator |
0.0 | 1 | 1978 | The Serial Microprocessor Array (SMA): Microprogramming and Application Examples · ISCA 1978 |
Methods — techniques the papers use, named apart from their topics
microprogramming · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1978 | The Serial Microprocessor Array (SMA): Microprogramming and Application ExamplesabstractThe structure of the Processing Element (PE), which is the basic component of SMA1, is presented. The PE consists of a simple serial arithmetic unit, a local high speed data memory, serial input and output ports, serial communication channels with neighbouring PE's, and some local control logic. The PE array operates under the control of a microprogrammed Array Control Unit (ACU). The peculiarities of ACU microprogramming are discussed, and some typical microprograms are reported. After presentation of the SMA principal instructions, some application programs are described implementing common radar filtering algorithms. Paolo Corsini, Graziano Frosini, Fabrizio Grandoni 0002, G. Galati, M. La Manna |
ISCA | 4 |