To achieve increased capacity over legacy twisted-pair copper, standards have considered use of increasingly high frequencies. The most recent digital subscriber line (DSL) standard, G.fast, carried forward the forward error correction scheme from the previous standards, namely the concatenated Reed Solomon and multi-dimensional trellis coded modulation scheme. In this work, a novel joint code and interleaver optimisation for low-density parity-check (LDPC) coded multicarrier systems with variable bit loading is proposed. This optimisation exploits the effects of both the channel and the modulation scheme on the soft information available at the LDPC decoder, through use of extrinsic information transfer (EXIT) analysis. The performance of the proposed scheme is demonstrated for the discrete multi-tone system operating on a twisted-pair channel.

Low‐density parity‐check (LDPC) codes have excellent performance for a wide range of applications at reasonable complexity. LDPC codes with short blocks avoid the high latency of codes with large block lengths, making them potential candidates for ultra reliable low‐latency applications of future wireless standards. In this work, a novel informed dynamic scheduling (IDS) strategy for decoding LDPC codes, denoted reliability‐based residual belief propagation (Rel‐RBP), is developed by exploiting the reliability of the message and the residuals of the possible updates to choose the messages to be used by the decoding algorithm. A different measure for each iteration of the IDS schemes is also presented, which underlies the high cost of those algorithms in terms of computational complexity and motivates the development of the proposed strategy. Simulations show that Rel‐RBP speeds up the decoding at reduced complexity and results in error rate performance gains over prior work.

Low-density parity-check (LDPC) codes are capable of achieving excellent performance and provide a useful alternative for the high-performance applications. However, at medium to high signal-to-noise ratios, an observable error floor arises from the loss of independence of messages passed under iterative graph-based decoding. In this paper, the error floor performance of the short block length codes is improved by the use of a novel candidate selection metric in code graph construction. The proposed multipath extrinsic message degree (EMD) approach avoids harmful structures in the graph by evaluating certain properties of the cycles introduced in each edge placement. We present multipath EMD-based designs for several structured LDPC codes, including quasi-cyclic and the irregular repeat accumulate codes. In addition, an extended class of the diversity-achieving codes on the challenging block fading channel is proposed and considered with the multipath EMD design. This combined approach is demonstrated to provide the gains in decoder convergence and error rate performance. A simulation study evaluates the performance of the proposed and existing state-of-the-art methods.

We propose an Iterative Detection and Decoding (IDD) scheme with Low Density Parity Check (LDPC) codes for Multiple Input Multiple Output (MIMO) systems in block-fading receivers and fast fading Rayleigh channels. An IDD receiver with soft information processing that exploits the code structure and the behaviour of the log likelihood ratios (LLR)'s is developed. Minimum Mean Square Error (MMSE) receivers with Successive Interference Cancellation (SIC) and with Parallel Interference Cancellation (PIC) schemes are considered. The soft a posteriori output of the decoder in a block-fading channel with Root-Check LDPC codes has allowed us to create a new strategy to improve the Bit Error Rate (BER) of a MIMO IDD scheme. The proposed strategy has resulted in up to 3dB of gain in terms of BER for block-fading channels and up to 1dB in fast fading channels.

A novel algorithm to construct structured LDPC codes based on graph connectivity and cycle quality is proposed. The performance of the constructed QC-LDPC and IRA codes is investigated and a performance improvement in the error floor region is demonstrated. The code constructions provided are flexible in rate and length and demonstrate that the enhanced EMD-driven PEG-based approach proposed may be applied to a number of other structured LDPC code classes, given consideration of correct constraints of the construction.

A novel construction for quasi-cyclic (QC) regular and irregular low-density parity-check (LDPC) codes based on a modification of the QC Progressive Edge Growth (PEG) algorithm is presented. Edge placement of the PEG-based algorithm is enhanced by use of the sum-product algorithm in the design of the parity-check matrix. The proposed algorithm is highly flexible in block length and rate, in particular when compared with algebraic constructions. The codes constructed by the proposed methods are tested in the AWGN channel and performance improvements are achieved. The proposed QC-LDPC codes provide an inherent trade-off between code performance and encoding/decoding complexity.

A novel construction for irregular low density parity check (LDPC) codes based on a modification of the Progressive Edge Growth (PEG) algorithm is presented. The edge placement procedure of the PEG algorithm is enhanced by the use of the Sum-Product decoder in the design of the parity-check matrix. The proposed algorithm, like the PEG algorithm, is highly flexible in block length and rate. The codes constructed by the methods presented are tested in the AWGN channel and significant performance improvements are achieved. The flexibility of the proposed decoder optimisation operation in its application to PEG-based construction methods is then demonstrated by its use in modifying the Improved PEG (IPEG) extension to the PEG algorithm to achieve further performance gains.