EDBT 2026 Demo / reviewers in the wild / expert
Sebastian Schmelzer
dblp:57/10647
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 91% Performance modeling and evaluation · 9% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
DRAM |
0.1 | 1 | 2010 | Memory Devices: Energy-Space-Time Tradeoffs · Proc. IEEE 2010 |
Memory systems
emerging memory technologies |
0.1 | 1 | 2010 | Memory Devices: Energy-Space-Time Tradeoffs · Proc. IEEE 2010 |
Memory systems › non-volatile memory
resistive memory |
0.1 | 1 | 2010 | Memory Devices: Energy-Space-Time Tradeoffs · Proc. IEEE 2010 |
Performance modeling and evaluation
system-level analysis |
0.0 | 1 | 2010 | Memory Devices: Energy-Space-Time Tradeoffs · Proc. IEEE 2010 |
Methods — techniques the papers use, named apart from their topics
energy-space-time tradeoff analysis · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Memory Devices: Energy-Space-Time TradeoffsabstractMany memory candidates based on beyond complementary metal-oxide-semiconductor (CMOS) nanoelectronics have been proposed, but no clear successor has yet been identified. In this paper, we offer a methodology for system-level analysis and address the relationship of the maximum performance of a given memory device type to device physics. The method is illustrated for the classical dynamic RAM (DRAM) device and for the emerging memory device known as the resistive RAM (ReRAM). Victor V. Zhirnov, Ralph K. Cavin III, Stephan Menzel, Eike Linn, Sebastian Schmelzer, Dennis Bräuhaus, Christina Schindler, Rainer Waser |
Proc. IEEE | 5 |